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PWM pull up or pull down

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spoonieluv

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Hi all,

I am an electrical engineer and feel I should know this, but I for the life of me still cant quite get this concept.

I understand conceptually the idea behind a pull up or a pull down, in that we want the IC to read a high state, by default, in the case of a pull up and low by default in case of pull down. But earlier to day an engineer was saying that we needed a lower pull down resistor to drive a pwm from 3 to 5 volts. I still dont get/understand the connection between a pull up/pull down and pwm signal? I get that its ideal to drive a motor using a pwm signal and a resistor could be used as an impedance to drive the pwm, but i still dont get the use of resistor in pwm to pull it "up" or "down"? an example, links or clarifications would be much appreciated. thanks
 

Hello spoonieluv

Have You saw here: https://www.resistorguide.com/pull-up-resistor_pull-down-resistor/
It is not to much but could help you.

But If: earlier to day an engineer was saying that we needed a lower pull down resistor to drive a pwm from 3 to 5 volts. Ask to him. . .
If you use a lower pull down resistor on a Pulse Width Modulation Signal (PWM) the voltage will drop below, let me say, from 5 to 3 volts. The PWM varies in amplitude only.
But mostly depends of the output impedance of the PWM circuit.

I hope this wording help you.
 

Unless there is an open-collector/open-drain PWM output that needs pulling to default level, which is unusual but not impossible, I see no connection between the two things. If the PWM is used to generate an an analog signal of 3V from a 5V supply it would be done by setting the pulse width not it's amplitude.

Brian.
 

Unless there is an open-collector/open-drain PWM output that needs pulling to default level, which is unusual but not impossible, I see no connection between the two things. If the PWM is used to generate an an analog signal of 3V from a 5V supply it would be done by setting the pulse width not it's amplitude.

Brian.

Hi Brian,

Thanks for the reply.

I was thinking the same thing. My idea of controlling the voltage would have been vary the transfer function that maps duty cycle to voltage. But i think maybe my lack of understanding is probably in the setup. We had built a level translator circuit that took a 0-5 v pwm and boosted it to 0-12 v pwm. when looking at the oscope signal, the other engineer says we need to get lower resistance to pull the output voltage from 3 to 5 volts. so that is where my confusion lies...why not just vary the duty cycle?
 

Pulse Width Modulation outputs produce digital waveforms that can be used as low-cost digital-to-analog converters with only a few external components. To convert the PWM signal to an analog voltage, a low-pass filter is used. Concerns when selecting the components for the filter are noise components inherent in digital waveforms. PWM signals contain strong noise components at the PWM frequency and at odd harmonics of that frequency. The load on the filter should be kept as low as possible and use of a voltage follower buffer amplifier may be required in some applications.
 

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