Put resistor at base of BJT of BANDGAP circuit

[twonsr]

bjt without base resistor

Hi All :

I have a question...

In a bandgap circuit , if put 2 resistors (RB1 ,RB2)at base for those 2 BJTs, what benefits can the circuit get ?

Thanks a lot.

 

[Btrend]

resistor on the base of bjt

in my opinion,
in CMOS, the bases of vertical BJT are always connected to GND, if u add resistors to base nodes, ur PTAT current will not be ΔVeb/R, it will include some other terms which is not related to KT/q. so u will encounter more problems rather than get benefits.

 

[twonsr]

beta of bjt in bandgap circuit

But ...
some guys revrse some ICs and find that.
There must be some purpose.

 

[Btrend]

base resistor oscillate

can u post the ckt.
I am interesting about this.
I have read some documents about bandgap, and never saw such configuration.
Anyway, as ur words, "There must be some purpose" !!
However, there are resistors connect at emitter of both BJTs, to get a bandgap voltage < 1.25V. I wonder that if these resistors are what u mentioned about.

 

[Btrend]

bjt resistor

I saw an article which may answer ur question,
and the full doc is in

 

[qutang]

why would you put a resistor on

the small signal will be seperate.

 

[twonsr]

All :

I upload the circuit as the attached file.

I am happy to share your idea.

 

[gszczesz]

The BJT's are common base. The inductance in ground paths make them succeptable to oscillation. You put a resistor on the base to prevent any potential oscillations.

 

[twonsr]

But why not put just one resistor from base to ground ?

It put two base resistors...

 

[rambus_ddr]

I think that the two resistor are used to compensate the curve. Since the two npn base resistor is different(N:1), which make the true delta(Vbe) is not (KT/q)*lnN, but (KT/q)*lnN + delta(rb )*(Ie/B), so add this two resistors compensate the delta(rb).

 

[gszczesz]

If you put only 1 resistor to ground then the common point is not ground, but a voltage that is a function of the base currents. This degrades the bandgap voltage. If you use the individual resistors then they can be modeled as emitter resistors scaled by Beta. This offsets the existing resistors a little, but the ratio stays the same because Beta match between the two transistors should be fairly good, and the base resistors should be scaled the same way as the emitter resistors.

Additionally, individual base resistors will kill a transistor-transistor oscilaltion path, not just a ground path.

As far as the argument that these resistors are used to fix any existing base resistance, this is unlikely since the base resistors are going to be scaled by the transistor ratio size, and can be taken out from the emitter resistors instead. Furthermore, base resistance varies wildly over process and is too hard to compensate.

Greg

 

[Btrend]

i don't think the resistor is used to avoid oscillation due to noise.
in bandgap design, if u had checked the loop properties, and make negative feedback gain > positive feedback gain with some compensation such that u got a enough phase margin, then there is no means to make it oscillate evev though the parasitice caps loading, or thermal noise.
Besides, in CMOS the bandgap core consume only a little current, so there is no such Ldi/dt noise coming from inductance as mentioned in gszczesz's post, and there is no switching in the bandgap core, so the inductance in ground path is simply a short wire not an inductor (impedance = jwL=0, cause w=0).
Moreover, if u add a AC nois at the base of either BJT, break the loop and check frequency response at the return ponit, u will see a negative feedback response (i.e. the noise return will be smaller than its previous one).

 

[gszczesz]

1) Its not noise from inductors that you are worried about. Inductance in common base produces a phase change that degrades phase margin. As frequency increases, inductance increases the impedance at the base allowing an inducted signal to propagate through the base and get amplified. In other words, it causes gain to increase with frequency for coupled in signals.

2) If doing a proper centroid layout for the BJT's, you will get sufficiently long inductive paths in the base to warrent attention.

3) Bandgaps in noise environments (i.e. charge pumps, etc...) where ground noise is an issue can benefit from base resistance.

4) The different resistors and BJT sizes will cause different substrate coupling as well as gain roll-off from the positive/negative paths. Although you design for the negative path to be dominant, the two paths may not roll off at the same time and additional compensation may be required.

5) Even if your system is stable, the phase/gain margin you have may not be sufficient to produce adequate dampening in response to an impulse. In noisy systems, the bandgap may need to have additional damping in order to provide a sufficient quiet output voltage (in other words, good rejection to noise).

Greg

 

[Btrend]

1. it's not the same as common-base amplifier u stated, the VCB=0 in the original design. and even though Vcb <> 0 ,it is very small. and the collector is connect to GND. it's a PNP BJT and Vcb=0, I don't see any gain from base to emitter. it's just a level shifting if noise inject from base of BJT. so there is no phase shift from base to emitter, it should be in phase.
2. I wonder how large inductance u will get in the base of BJT ? nano Henry? or pico Henrry? As I know, the bonding wire which is much larger than any metal in IC is ony around 5nH depending on the length of the wire. and moreover, the bandgap core is equivalent to a LPF, and the cutoff frequency are always < 0.1 MHz, to attenuate high freq. noises.
3. if gnd noise is important, than the low impedance path , i.e. from GND to collector to emitter should be take more care than base. because it's current is larger than base current. and these two pathes are parallel and shorted at emitter, so the equivalent impedance from gnd to emitter is dominate from collector to emitter. and because Vcb ≈ 0, the BJT is in saturation region, so it's equivalent ro is really small. so u got a poor PSRR-. cause PSRR- is related to Vs*(Rload)/(Rload+Rs), if ur Rs is small, u can not get an good PSRR-.
4. compensation is always needed
5. as talking about noise, we should first idenfy where the noise come from , right? and find ways to attenuate it. power noise , gnd noise , thermal noise, flicker noise, which will affect the bandgap core seriously ? some noise is frequency related, and can not be "damping", only can be reduced by lpf.

question me if i'm wrong.
thanks

 

[gszczesz]

Each one of my responses will have the same number as the points they are addressing of your Btrend:

1) You are restricting yourself to a small signal path that is the same as the circuit. Also, oscillation cares about power gain, not just voltage gain. Oscillations can occur through paracitics your are not including. A small power signal injected to the base will create a much larger current through the transistor's path. That current can then couple elswhere in your design either through groun parasitics, or show up on the bandgap voltage and through that. The degenerating emitter resistor may be bypassed through other parasitics (i.e. Amplfier's transistors) and have a lot more gain then expected.

2) 1.2nH for a typical bond wire in a QFN package. The quaded BJT's will have approx. 0.3nH to 1nH depending on the layout. I think the problem you are having is that you are restricting your analysis to the bandwidth of the bandgap. It's not the bandgap's bandwidth we are worried about, but the transistors. The oscillation path need not be restricted to the bandgap itself. You must remember that the bandgap voltage goes everywhere and is routed everywhere, so it's a prime suspect in most oscillation paths.

3) Incorrect. The BJT is not in saturation. You usually need at least 0.3 Volts reverse bias before you could consider that junction to start forward biasing. The Transistor has good rejection on the collector side because as you said it yourself, it acts as a follower (from base to emitter). However, the base node will amplify the signal.

4) Correct. I think you are implying that since the bandgap is compensated, we need not to worry about it contributing to other oscillation paths. The resistors will reduce the cap required and help in other oscillation paths as well.

5) Trying to find the source of the noise is great, but reducing the probability of any oscillations even if you missed a coupling mode is good too. In noisy circuits like Charge Pumps you can not get away from noisy grounds and substrates. Helping the bandgap have better impulse response leads to more robust circuits. Nobody wants to be forced to do a second spin (or third.. .etc... ), adding these resistors can help reduce the probability of another spin being required even if you miss some oscillation/coupling paths.

Greg

 

[Btrend]

1. I think u r right. in BJT , we should consider current gain, not just voltage gain which I addressed before.
2. if u want to route ur bandgap reference in a long path, u should use buffer after the bandgap core, not just put Vbg at everwhere in IC. that's not a pratical method.
3. i'm wrong in the statement, the PNPs are not in saturation, they are in the active region. afterall, BJT's operation is not the same as MOS. so since the BJT are in active region, their ro should be large, and so does the rejection will be good from collector to emitter.
5. I have done some simulations about the addition of Rb .
5-1 voltage noise:
if no Rb present, the voltage gain from Base to emitter is about -1dB, after add resistor range from 1 ~ 10k, the voltage gain is still about -1db.
5-2 current noise :
the current gain at emitter is about -120dB without Rb. and with Rb=1 ~ 1k, the gain is about -6db at Q1's emitter, and about 6db at Q2's emitter.
5-3, the voltage gain from collector to emitter is about -80db, which make sense, cause as state in 3, the PNP is really in active region.
5-4 apply voltage noise at the GND , and find response at emitters, the gain is about -1dB with Rb=1~10k ===> it is clearly dominated by 5-1.
5-5, if my simulation is correct, the addition of Rb has no improvement in noise reduction from GND.
6. by the way, in my simulations, the adding Rb can change the bandgap voltage.

 

[gszczesz]

Do you know how to do stability analysis, Btrend? How would you find the gain margin and phase margin and at what frequency?

Do phase and gain margin analysis around the bigger transistor with and without the resistors (and no other compensation cap) and you will see what I mean.

Greg

 

[Btrend]

1. I always break the feedback loop, and add a AC noise at the point where I break, then check response of the return point. from this frequency response, I can find the open loop frequency response H(s). and Phase Margin is equal to
180°+Φ(H(jwu)), where wu is the unit gain frequency. Gain margin is equal to
0-|H(jw_180)|, where w_180 is the frequency make Φ(H(s))=180°.
Is there anything wrong ?
2. I don't understant why not include the compensation cap. in doing AC analysis ?
3. I had done more simulations about this topic, I noticed that the adding resistors Rb will restrict current (series feedback) in the emitter, such that the bandgap voltage is changed if the original resistors are used.

anyway, Greg can u show details how to do the simulation or analysis u had mentioned, or can u give me some documents, papers, references to read and to improve my knowledge.
thanks in advance.

 

[gszczesz]

Btrend,

What you are doing is essentially right. If using cadence, you can simply place a DC voltage source with 0 volts across it in your path and run STAB analysis. That analysis gives the bode plot response without you needing to worry about breaking the loop and presenting the correct impedances at each end.

I mentioned not to use the compensating cap because if the capacitor you use gives a strong dominant pole then it will mask the effect of the resistors (the zero they add). If you look at the uncompensated response then it will be clear where the resistors zero lies and, if chosen properly, you will see the reduction in the compensating capacitor requried. You should also see the gain at higher frequencies go down (at the frequencies where the transistors Cpie capacitors start taking effect). Be sure to include some realistic ground/supply impedances.