# pulse width stretching

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#### iaf

##### Member level 3
i want to design a circuit for stretching the "0" output of my signal. I have seen the Monostable multivibrator but it stretches the "1" output. is there anyway flipping it or another topology for realizing that?

#### barry

Could you give us more information? Is this a digital system? Is there a clock? You could use a schmitt-trigger AND gate where the signal goes directly to one input and through an RC to the other input.

"Is there anyway of flipping it?" Of course; use an inverter.

#### FvM

##### Super Moderator
Staff member
In addition, most monostable chips have trigger inputs for both polarities. Pulse stretching refers to retriggerable monoflop, otherwise the pulse width would be also limited.

#### iaf

##### Member level 3
Could you give us more information? Is this a digital system? Is there a clock? You could use a schmitt-trigger AND gate where the signal goes directly to one input and through an RC to the other input.

"Is there anyway of flipping it?" Of course; use an inverter.
it's a digital output of a d-flipflop which is clocked by a 50MHz clock. Adding an inverter will invert the "1" to "0" which is not the goal.

#### FvM

##### Super Moderator
Staff member
Adding an inverter will invert the "1" to "0" which is not the goal.
barry answered your question in post #1 (how can we use a monoflop with inverse input polarity), you apparently forgot your question.

#### iaf

##### Member level 3
In addition, most monostable chips have trigger inputs for both polarities. Pulse stretching refers to retriggerable monoflop, otherwise the pulse width would be also limited.
I#m designing the circuit so i don't have a ready to use multivibrator

#### FvM

##### Super Moderator
Staff member
I#m designing the circuit so i don't have a ready to use multivibrator
Fine, than just design it with correct polarity and don't forget the retrigger point if you expect input pulses longer than the monoflop period.

#### iaf

##### Member level 3
Could you give us more information? Is this a digital system? Is there a clock? You could use a schmitt-trigger AND gate where the signal goes directly to one input and through an RC to the other input.

"Is there anyway of flipping it?" Of course; use an inverter.
sorry didn't get it. am i supposed to have two inputs?

#### barry

sorry didn't get it. am i supposed to have two inputs?
I don't think there are any one-input AND gates.

#### iaf

##### Member level 3
Fine, than just design it with correct polarity and don't forget the retrigger point if you expect input pulses longer than the monoflop period.
how do i change the polarity? i just want to extend the 0 output for some ms as an example. The design i used was a NOR gate connected to a capacitor and resister with an inverter in the end giving the output

#### summitville

##### Member level 3
Low Going Pulse Stretcher using two NAND Gates ...
NAND_GATE
scroll down for schematic
Use "High Speed" and right hand device, best if, "Schmidt Trigger" Input
Width of trigger pulse must be wider than gate delays

Or use something like 74AHC123A or 74AHCT123A Monostable ...
MONO-STABLE
Has both Rising Edge & Falling Edge Triggers

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Can your Low-Going Pulse discharge a small Capacitor ?

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iaf

### iaf

points: 2

#### barry

Have to consider pulse width, etc. in selecting RC. Can also put diode across R for narrow input pulse.

iaf

### iaf

points: 2

#### iaf

##### Member level 3

View attachment 153653

Have to consider pulse width, etc. in selecting RC. Can also put diode across R for narrow input pulse.
is there any schematic of this schmitt trigger? as i have to design it in that case

#### andre_teprom

##### Super Moderator
Staff member
it's a digital output of a d-flipflop which is clocked by a 50MHz clock. Adding an inverter will invert the "1" to "0" which is not the goal.
Would I be wrong in assuming that you are on the scope of a programmable logic circuit design? In this case, it would make little sense to implement this circuit with an analog approach.

#### iaf

##### Member level 3
Would I be wrong in assuming that you are on the scope of a programmable logic circuit design? In this case, it would make little sense to implement this circuit with an analog approach.
no it's actually an analog design just having a digital output

#### barry

is there any schematic of this schmitt trigger? as i have to design it in that case
It's a bad idea because you'll never pull the input lower than one diode drop+Vlo of the source. This may not be low enough to effect a logic '0'.
.

#### iaf

##### Member level 3
so how would i design this schmitt trigger with 2 inputs?

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another problem with this design is that the pulse will be stretched in a constant time regardless how long the input takes, which is applicable in case if the input is longer the RC time constant, so is there a solution to add this time constant to the original width?

#### FvM

##### Super Moderator
Staff member
is there any schematic of this schmitt trigger? as i have to design it in that case
Two single ST gates and an AND.