pulse generator in vhdl

[ZeleC]

pulse generator vhdl

hello anyone got links or app notes for doing a edge triggered pulse generator to be implemented in a cpld
thank you

 

[brmadhukar]

vhdl pulse generator

Hi,
You can use asimple code to generate this. Make an output high at the clock' event and after a fixed delay pull it down. This acts like a mono shot.
B R M

 

[r_e_m_y]

pulse generator vhdl code

Hi ZeleC,

Couldn't you reuse this ?


:wink:

 

[ZeleC]

well r_e_m_y im trying to search some another code
well there is a problem with such a trigger generator
suppose that i have a 1 second clock
if i want for example a pulse of 2 sec well i will not get exactly 2 sec i will get 2 sec + ,because the trigger pulse is in between
wht i want is when the cicuit is just trigger to start counting.
i hope that you understood what i mean .

and hope to have some ideas from you friends .
thank you .