Pulse density modulation DAC (Delta Sigma DAC)

[tekno1]

pulse density modulation

Hi All,

is PDM DAC good for DC applications? What are the drawbacks? Tones really makes it unusable even high order modulation is employed? How about latency? How is the latency in sigma delta DACs? Is the latency in usec or msec range?

Is PDM DAC good for motor control, industrial applications, board voltage current monitoring type applications? What are the drawbacks?

I see manufacturers still selling resistor string DAC's for these applications. What are the reasons they sell this big area costly parts instead of sigma delta DACs?

How is the 1 bit DAC implemented in sigma delta? Since this DACs are open loop (except the SD modulator front end) how is the long term drift at the output is controlled? How is the gain error controlled?

If we have sigma delta in logic gates and drive PWM type a DAC with it increasing resolution (open loop circuit with no output feedback. just a register value for desired level and from it an analog output). This case how is the drift and accuracy fares? How offen a calibration is needed?

Any info, design lead regarding Sigma Delta DAC's will be highly appreciated

thanks in advance. And sorry for too many questions.

 

[elbadry]

pdm dac

I will try to answer some:

1. Sigma delta is suitable for small bandwidth and high resolution applications (typical for audio). It can be used for dc. There are techniques used to overcome the idle tone problem + higher order loops suffer less from this problem.

2. Latency is a function of the resolution needed. You can roughly (very roughly) estimate the latency as 2^n*ts (where ts=1/sampling frequency)

3. The 1-bit DAC is simply a two level output signal which can be applied to an analog reconstruction filter to rebuild the analog output. Some sigma delta dacs used multi-level DACs before the filter

Hope this was useful

 

[tekno1]

pulse density modulation dac

Jezakullah Hayran br. ElBadry


I was thinking one bit DAC as charge pump like the one in PLL (two current sources sourcing or sinking current with the control of input). Although an inverter will also do the job but matching p and n currents would be issue.

Helped button is activated thanks again

 

[elbadry]

pulse-density modulation

Jazana wa eyakom

Are you arabic?

 

[tekno1]

pdm modulator bandwidth

@ElBadry,

s.a. No. I am across the Mediterranean north of where you are As big a country as yours.

 

[elbadry]

pulse density modulation circuit

Nice meeting you anyway

Turkish then?

 

[sarveshks2003]

dac+delta

Hi
Please someone upload some good book or papers on sigma delta DAC design
Thanks in Advance