Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

pull-down for FDV301N N-FET

Status
Not open for further replies.

treitmey

Member level 1
Joined
Jan 22, 2008
Messages
38
Helped
4
Reputation
8
Reaction score
0
Trophy points
1,286
Activity points
1,510
I have a relay that is driven from a PIC 18F452.
It is driven with a FDV301N N-FET.
I've put a 10k in series with the uC pin to limit current to the FET.

NOW I want to put a pull-down on the pin for when the micro-controller is in
reset and the pin is set as input. so I don't want the input to float, So I want to
put a pull down on it.

My question is should the pull down go before or after the 10k that is there,..
and what should the resistor values be.
My thinking is that if a resistor is at the Micro controller pin, and that pin is set high, then
there is going to be a voltage divider. +5,Res1,Res2,Gnd, and that the FET won't
see the +5V. What is the math that I should use to calculate the resisters.
https://www.fairchildsemi.com/ds/FD/FDV301N.pdf
 

I see that the FET is fully on with Vgs = 2.7 V
 

Your circuit will have large turn_on and turn_off times using a 10KΩ resistor in series with the FET gate (because of the gate´s capacitance at transitions), but if it is not a problem it´s OK. I would like suggesting your changing the value to about 100Ω if you need faster transitions. The more voltage on the gate the lower the Rds_on, so place the pull down resistor at the output pin of the mcu (before the gate´s resistor) . I suppose that before entering reset or sleeping modes you have turned the FET off, so the pull_down resistor can have a high value but low enough to prevent noise from affecting the mcu pin. A good starting point would be 10kΩ because even if you forgett to turn_off the FET before entering reset mode, the time to turn it off will be the same as in the actual circuit.
 

I see what you mean.
Can you tell me how you calculate the 100 ohm gate resistor.
That is what I'm have trouble with.






btw unrelated
I did find a note about how to calc the power of the gate resistor
see below
>The gate resistors are in series with the gates but they are all driven
>from a single source.
>


The average power dissipated in a series gate resistor is about

P = C * F * V^2

where

C is total effective gate capacitance, Miller included

F = drive frequency

V = gate drive voltage.

So calculate that and see if it's within the resistor's power
dissipation spec.

John
 

As you intend to drive a relay I presume you are not going into high switching frequencies (well bellow the kHz range). The series gate resistor is usefull for two purposes:
1- To prevent oscillations due to the high gate´s capacitance
2- To prevent high inrush currents during transitions (also due to capacitance).
So, it is more safe to preserve the integrity of the PIC port than any other thing. A value of 100Ω is (my opinion) the lowest that is safe for the PIC (but you can try down to 10Ω if you want, even a direct connection will work) and at the same time gives you a fast transition. Please keep in mind that any relay is much slower than a FET. With respect to dissipated power, you will not notice it in that circuit and can use any wattage you want. Nothing needs to be calculated in this circuit. Furthermore, don´t forgett to place a freewheel diode in parallel with the relay´s coil to protect the FET (1N4148 works fine).
Regards
 

    treitmey

    Points: 2
    Helpful Answer Positive Rating
OK. Got it. Just a current limit for protection of PIC pin.
as for the diode. Got it. D5 see download image.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top