First off, consider the problem of dynamic vs static PSRR.
Your bandgap is fed by something. Do you care if that
something's incoming ripple is passed unattenuated to
the destination?
For DC PSRR, 53dB is OK for DC accuracy goals on
a power management device; not OK for a data acq
reference beyond about 8-10 bits.
For RF applications you see people advertising 40dB
at 1MHz PSRRs, so the upstream switcher's ripple is
well-killed. That means a much higher DC PSRR.
The single easiest thing is to power the bandgap
from a local "poor boy" LDO regulator that has some
really good HF PSRR, maybe not fabulous (or even
regulated) DC accuracy. Like a low-VT NMOS
follower biased by a resistor/MOS diode stack and
decouple the heck out of its gate and source.
This makes vdd' a cleaner (AC-wise) power supply
and adds directly to your PSRR without messing the
bandgap itself around, any.