[SOLVED] Project to replace CY7C64613 in the ICD2

[evc]

Question to Albert22

First let me tell you what terrific work you've done so far! Congratulations!
And my question (it's more like suggestion) is - Why we don't try to put it all in one microcontroller - PIC18F4550? My idea is to load the operating system (originaly dedicated to be written into 16F877(A) ) into PIC18F4550's RAM (it will be enough, i think). And then the software of the 18F4550 to act like interpretator for this operating system. The only fault will be that you have to download this operating system every time when you switch on the power supply of ICD2, but the download will be much more faster. I think i can do it, only if i knew the comunication protocol between PC and ICD2. Any way, i will try to do it, with your support or without, but i like team play and think it will be fun. Unfortunately i have lately much more work then i would like to, so i don't know when it will be possible to visit this forum again, but still hope to receive some sign from you!

 

[caproni]

Hi folks:

I made a board of ICD2 provided by PiCS, but I´m having problems to put it works.

Can anybody help me?

First, I made little modifications in the board.
- I changed the 470R resistors of the LEDs to 330R.
- I used L2 of 220 uH. I measured the VPP voltage and it is 12.5 V.
- I didn't use L1. I put a wire on it.

I burnt 18f4550 with 18F4550_boot.hex provided by PiCS and 16f877-20/P with original Microchip BL010101.hex.

I made some tests:

Tests made only with 18F4550 plugged on board:
- Windows XP recognize board as Microchip Tool
- Led POWER on, LED USB on
- Mplab presents:

      Connecting to MPLAB ICD 2
      ICD0289: Unable to re-program ICD2 USB OS firmware.
      ICD0021: Unable to connect with MPLAB ICD 2
      MPLAB ICD 2 Ready

With 16F877 plugged:
- Windows XP recognize board as Microchip Tool
- Led POWER on, LED USB on
- Mplab presents:

       Connecting to MPLAB ICD 2
      ...Connected
      ICD0082: Failed MPLAB ICD 2 operation
      MPLAB ICD 2 Ready
      Connecting to MPLAB ICD 2
      ...Connected
      ICD0082: Failed MPLAB ICD 2 operation
      MPLAB ICD 2 Ready
      Connecting to MPLAB ICD 2
      ...Connected
      ICDWarn0054:  MPLAB IDE has lost communications with the MPLAB ICD 2.
 Would you like to attempt to reconnect?
      Connecting to MPLAB ICD 2
      ...Connected
      ICD0286: Unable to communicate with ICD
      ICD0082: Failed MPLAB ICD 2 operation
      MPLAB ICD 2 Ready

So, here is my problem.

Thanks very much for any help.

Regards
Caproni

 

[polymath]

Hi Caproni

The Hex you programmed into the 877 is ONLY a bootloader and MPLAB does not recognise it - hence ..... 'unable to connect .......'

Have you manually downloaded an OS to the 877 after the unit is recognised by your PC? It is this OS which communicates with MPLAB.

Debugger menu - select tool - 2_MPLAB-ICD2
Debugger menu - Download ICD2 OS

A further recommendation is to change to the 877A - it is much faster when downloading a new OS and very much faster programming when used as a target.

hope this helps ... Polymath

 

[caproni]

Hello polymath

Thanks for your help.

I tried today load the OS (ICD01020700.hex) , but it didn't works. Here is the messages from MPLAB:

Downloading Operating System
ICD0042: API:  Error response (Command Failed (0x07))
...Download Operating System Failed
ICD0024: Communications:  Failed to write ('$7F00
' - 6 of 6 bytes - Windows::GetLastError() = 0x0, 'A operação foi concluída com êxito.
' - USBCOM = 0x1)
ICDWarn0054:  MPLAB IDE has lost communications with the MPLAB ICD 2.  Would you like to attempt to reconnect?
Connecting to MPLAB ICD 2
...Connected
ICD0286: Unable to communicate with ICD
ICD0082: Failed MPLAB ICD 2 operation
ICDWarn0054:  MPLAB IDE has lost communications with the MPLAB ICD 2.  Would you like to attempt to reconnect?
Connecting to MPLAB ICD 2
...Connected
ICD0286: Unable to communicate with ICD
ICD0082: Failed MPLAB ICD 2 operation
ICDWarn0054:  MPLAB IDE has lost communications with the MPLAB ICD 2.  Would you like to attempt to reconnect?
Connecting to MPLAB ICD 2
...Connected
ICD0286: Unable to communicate with ICD
ICD0082: Failed MPLAB ICD 2 operation
ICDWarn0054:  MPLAB IDE has lost communications with the MPLAB ICD 2.  Would you like to attempt to reconnect?
ICD0286: Unable to communicate with ICD
MPLAB ICD 2 Ready
Connecting to MPLAB ICD 2
...Connected
ICDWarn0054:  MPLAB IDE has lost communications with the MPLAB ICD 2.  Would you like to attempt to reconnect?
ICD0286: Unable to communicate with ICD
MPLAB ICD 2 Ready

The MPLAB stay trying to reconnect many times.

I got a 220uH to put on L1 position (it was a wire), but didn't works too.

Another idea???

Thanks a lot.

Regards
Caproni

 

[emcs51]

I made a board of ICD2 provided by PiCS too,I´m having problems as caproni !

 

[potyo]

Hi
I've written sample code for the 12F683. The schematic is attached.

 LIST P=12F683
 #include <P12F683.INC>

 ERRORLEVEL -302
 ERRORLEVEL -8

#define	CHIP_SEL	GPIO_TMP, 0
#define	SPI_CLK	GPIO_TMP, 4
#define	SPI_IN	GPIO_TMP, 3


	CBLOCK	0x20
		RECH	;Upper byte of the received data
		RECL	;Lower byte of the received data
		REQUIRED	;The required voltage
		GPIO_TMP	;Temporary register for temporary storing the GPIO register
	ENDC


	ORG	0x0000
	GOTO	START

	ORG	0x0004
	BTFSC	PIR1, ADIF
	GOTO	AD_INT

;	MOVFW	TMP		;Used only for simulation in MPLAB
	MOVFW	GPIO
	MOVWF	GPIO_TMP
	BCF	INTCON, GPIF
	BTFSC	GPIO_TMP, 0
	GOTO	SPI_REC_FINISHED
	BCF	INDF, 6		;Disable ADC Int during SPI receiving
	BTFSS	GPIO_TMP, 4
	RETFIE
	BCF	STATUS, C
	BTFSC	GPIO_TMP, 3
	BSF	STATUS, C
	RLF	RECL
	RLF	RECH
	RETFIE

SPI_REC_FINISHED
	BSF	INDF, 6		;Enable ADC Int
	MOVLW	0x11
	XORWF	RECH, W
	BTFSS	STATUS, Z
	RETFIE
	MOVFW	RECL
	MOVWF	REQUIRED
	CLRF	RECH
	RETFIE


AD_INT
	BCF	PIR1,ADIF
	MOVFW	ADRESH
	SUBWF	REQUIRED, W
	BTFSC	STATUS, C
	INCF	CCPR1L, F
	MOVFW	ADRESH
	SUBWF	REQUIRED, W
	BTFSC	STATUS, Z
	DECF	CCPR1L, F
	BSF	ADCON0, 1
	RETFIE

START
	BCF	STATUS, RP0	;Bank0
	CLRF	GPIO
	MOVLW	0x07
	MOVWF	CMCON0		;Comparator disabled

	BSF	STATUS, RP0	;Bank1
	MOVLW	b'00100010'
	MOVWF	ANSEL		;Fosc/16, GP1/AN1 analog input
	MOVLW	b'11111111'
	MOVWF	TRISIO		;GP0:5	input

	BCF	STATUS, RP0	;Bank0
	MOVLW	b'00000101'
	MOVWF	ADCON0		;A/D result left justified, Vdd, AN1, ADC enabled

	BSF	STATUS, RP0	;Bank1
	MOVLW	0xFF
	MOVWF	PR2		;PWM period 50us(Frequency=20kHz)

	BCF	STATUS, RP0	;Bnak0
	MOVLW	b'00001100'
	MOVWF	CCP1CON		;PWM mode, Active high
	MOVLW	0x20
	MOVWF	CCPR1L		;initial PWM duty cycle=12.5%
	BCF	PIR1, TMR2IF	;Clear TMR2 interrupt flag
	MOVLW	b'00000100'
	MOVWF	T2CON		;TMR2 Prescaler=1
				;PWM frequency=20kHz
	BTFSS	PIR1, TMR2IF	;Wait for the 1st TMR2 interrupt
	GOTO	$-1
	BSF	STATUS, RP0		;Bank1
	BCF	TRISIO, 2		;Enable PWM output

	MOVLW	b'00010001'
	MOVWF	IOC		;Enable Interrupt On-Change on GP4 and GP0 (SPI Clock and Chip Select)

;	MOVLW	b'11011000'
;	MOVWF	OPTION_REG		;Used only for simulation in MPLAB


	BCF	STATUS, RP0
	MOVLW	b'11001000'
	MOVWF	INTCON		;GIE=1, GPIE=1 

	MOVLW	0x8C
	MOVWF	FSR
	BSF	INDF, 6		;Enable ADC Interrupt

	MOVLW	0x96
	MOVWF	REQUIRED		;Initital required voltage is set to 12V

	BSF	ADCON0, 1		;ADC start

	GOTO	$		;Endless loop

	END

 

[Fragrance]

Hi
I've written sample code for the 12F683. The schematic is attached.

 LIST P=12F683
 #include <P12F683.INC>

 ERRORLEVEL -302
 ERRORLEVEL -8

#define	CHIP_SEL	GPIO_TMP, 0
#define	SPI_CLK	GPIO_TMP, 4
#define	SPI_IN	GPIO_TMP, 3


	CBLOCK	0x20
		RECH	;Upper byte of the received data
		RECL	;Lower byte of the received data
		REQUIRED	;The required voltage
		GPIO_TMP	;Temporary register for temporary storing the GPIO register
	ENDC


	ORG	0x0000
	GOTO	START

	ORG	0x0004
	BTFSC	PIR1, ADIF
	GOTO	AD_INT

;	MOVFW	TMP		;Used only for simulation in MPLAB
	MOVFW	GPIO
	MOVWF	GPIO_TMP
	BCF	INTCON, GPIF
	BTFSC	GPIO_TMP, 0
	GOTO	SPI_REC_FINISHED
	BCF	INDF, 6		;Disable ADC Int during SPI receiving
	BTFSS	GPIO_TMP, 4
	RETFIE
	BCF	STATUS, C
	BTFSC	GPIO_TMP, 3
	BSF	STATUS, C
	RLF	RECL
	RLF	RECH
	RETFIE

SPI_REC_FINISHED
	BSF	INDF, 6		;Enable ADC Int
	MOVLW	0x11
	XORWF	RECH, W
	BTFSS	STATUS, Z
	RETFIE
	MOVFW	RECL
	MOVWF	REQUIRED
	CLRF	RECH
	RETFIE


AD_INT
	BCF	PIR1,ADIF
	MOVFW	ADRESH
	SUBWF	REQUIRED, W
	BTFSC	STATUS, C
	INCF	CCPR1L, F
	MOVFW	ADRESH
	SUBWF	REQUIRED, W
	BTFSC	STATUS, Z
	DECF	CCPR1L, F
	BSF	ADCON0, 1
	RETFIE

START
	BCF	STATUS, RP0	;Bank0
	CLRF	GPIO
	MOVLW	0x07
	MOVWF	CMCON0		;Comparator disabled

	BSF	STATUS, RP0	;Bank1
	MOVLW	b'00100010'
	MOVWF	ANSEL		;Fosc/16, GP1/AN1 analog input
	MOVLW	b'11111111'
	MOVWF	TRISIO		;GP0:5	input

	BCF	STATUS, RP0	;Bank0
	MOVLW	b'00000101'
	MOVWF	ADCON0		;A/D result left justified, Vdd, AN1, ADC enabled

	BSF	STATUS, RP0	;Bank1
	MOVLW	0xFF
	MOVWF	PR2		;PWM period 50us(Frequency=20kHz)

	BCF	STATUS, RP0	;Bnak0
	MOVLW	b'00001100'
	MOVWF	CCP1CON		;PWM mode, Active high
	MOVLW	0x20
	MOVWF	CCPR1L		;initial PWM duty cycle=12.5%
	BCF	PIR1, TMR2IF	;Clear TMR2 interrupt flag
	MOVLW	b'00000100'
	MOVWF	T2CON		;TMR2 Prescaler=1
				;PWM frequency=20kHz
	BTFSS	PIR1, TMR2IF	;Wait for the 1st TMR2 interrupt
	GOTO	$-1
	BSF	STATUS, RP0		;Bank1
	BCF	TRISIO, 2		;Enable PWM output

	MOVLW	b'00010001'
	MOVWF	IOC		;Enable Interrupt On-Change on GP4 and GP0 (SPI Clock and Chip Select)

;	MOVLW	b'11011000'
;	MOVWF	OPTION_REG		;Used only for simulation in MPLAB


	BCF	STATUS, RP0
	MOVLW	b'11001000'
	MOVWF	INTCON		;GIE=1, GPIE=1 

	MOVLW	0x8C
	MOVWF	FSR
	BSF	INDF, 6		;Enable ADC Interrupt

	MOVLW	0x96
	MOVWF	REQUIRED		;Initital required voltage is set to 12V

	BSF	ADCON0, 1		;ADC start

	GOTO	$		;Endless loop

	END

your attached schematic contain error and just blank white pdf page,please reupload after verified

 

[polymath]

Hi caproni

Which design are you using?
Which version of MPLAB are you using?
I cannot find informatiom on your error message:

ICD0289: Unable to re-program ICD2 USB OS firmware.

I am wondering if MPLAB is trying to reprogram the 4550 with a different USB-OS for the MPLAB version you are using.

To do this I think you need to pull RA4 (4550) to Vdd then connect to the USB port.
When MPLAB finds an incompatible USB-OS it will reprogram the 4550 if pin RA4 is High. See: switch S1 on ICD.5 http://www.mcu.cz

The Checksum for the USB-OS I used with MPLAB 7.40 is 0xDB46

hope this helps ... Polymath

 

[potyo]

,your attached schematic contain error and just blank white pdf page,please reupload after verified

I've now checked the file, and seems, it is ok. If more people can't see the schematic, i will upload it again.

 

[caproni]

Hi polymath. Thanks for help.

Hi caproni

Which design are you using?

I'm using PiCS design,

Which version of MPLAB are you using?

Mplab 7.40

I cannot find informatiom on your error message:

ICD0289: Unable to re-program ICD2 USB OS firmware.

Me too!!!

I am wondering if MPLAB is trying to reprogram the 4550 with a different USB-OS for the MPLAB version you are using.

To do this I think you need to pull RA4 (4550) to Vdd then connect to the USB port.
When MPLAB finds an incompatible USB-OS it will reprogram the 4550 if pin RA4 is High. See: switch S1 on ICD.5 http://www.mcu.cz

The Checksum for the USB-OS I used with MPLAB 7.40 is 0xDB46

I will try put the RA4 to VCC to reprogram 4550. I will made this after weekend.

hope this helps ... Polymath

Yes, is helping a lot! Thanks for your cooperation.

Regards
Caproni

 

[R2D1]

Potyo:
I can read your pdf using Acrobat 5.

Question:
Why use 2 buffer on both PGC & PGD?

Also, don't quite understand the function of 4066 in your design.

Suggestion:
Use 74LVC8T245 or 74LVC2T45 to replace 74HCT125 & 74AHC126.

 

[Mike K8LH]

Potyo,

Bravo on the 12F683 VPPGEN circuit & code. I haven't had a chance to even start a prototype yet (grin). Good choice to run it at 20-MHz. I suspect that's the only way it'll catch that 16-bit SPI sequence from the '877/A. Have you tested it yet? How does it work?

Kind regards, Mike

 

[potyo]

Bravo on the 12F683 VPPGEN circuit & code. I haven't had a chance to even start a prototype yet (grin). Good choice to run it at 20-MHz. I suspect that's the only way it'll catch that 16-bit SPI sequence from the '877/A. Have you tested it yet? How does it work?

Hi
I've not tested, because the 12F683 isn't arrived yet. The local dealer doesn't sell pisc, but if i order, then he will bring it for me. On the next week will i test is.

 

[Mike K8LH]

Potyo,

I like your elegant 20-MHz '683 solution. Though with only 18 or so instruction cycles between SPI_CLK rising edges, SPI timing may be a problem.

I fiddled with your code and moved SPI_SI to GP0 to try and improve speed.

#define SPI_CS  TEMP,2          ; GPIO,3 shifted right
#define SPI_CLK TEMP,3          ; GPIO,4 shifted right


RECH    equ     h'20'           ; Upper byte of the received data
RECL    equ     h'21'           ; Lower byte of the received data
VSET    equ     h'22'           ; the 'set' voltage
TEMP    equ     h'23'           ; working copy of GPIO

;*****************************************************************
;
        org     h'0000'
Reset
        goto    START

        org     h'0004'
ISR
        rrf     GPIO,W          ; GPIO>>1 in W, SPI_SI in Carry   |B0
        btfss   INTCON,GPIF     ; IOC interrupt?                  |B0
        goto    ISR_ADC         ; no, branch, else                |B0
ISR_SPI
        bcf     INTCON,GPIF     ; clear IOC interrupt flag        |B0
        movwf   TEMP            ; save GPIO in TEMP               |B0
        btfsc   SPI_CS          ; SPI_CS rising edge?             |B0
        goto    ISR_SPI_Done    ; yes, branch, else               |B0
        bcf     INDF,6          ; disable ADC int (PIE1,ADIE)     |B0
        btfss   SPI_CLK         ; SPI_CLK rising edge?            |B0
        retfie                  ; no, exit ISR, else              |B0
        rlf     RECL,f          ; add new bit to 16-bit buffer    |B0
        rlf     RECH,f          ;                                 |B0
        retfie                  ; exit ISR                        |B0

ISR_SPI_Done
        bsf     INDF,6          ; enable ADC int (PIE1,ADIE)      |B0
        movf    RECH,W          ; command byte                    |B0
        andlw   b'00010000'     ; a write data command?           |B0
        skpnz                   ; yes, skip, else                 |B0
        retfie                  ; exit ISR (ignore command)       |B0
        movf    RECL,W          ; get data byte                   |B0
        movwf   VSET            ; set new digi-pot value          |B0
        clrf    RECH            ; clear command byte var          |B0
        retfie                  ; exit ISR                        |B0
;

Timing still very tight when you consider interrupt latency. It looks like SPI_CLK falling edge occurs only 5 instruction cycles after the rising edge. Could we avoid the SPI_CLK falling edge IOC interrupt by by reading GPIO and clearing the GPIF interrupt flag after the SPI_CLK falling edge occurs while processing the rising edge interrupt?

;*****************************************************************
;
;  sample code; interrupt triggered on SPI_CLK rising edge or on 
;               SPI_CS rising/falling edges
;
ISR_Alternate
        btfss   INTCON,GPIF     ; IOC interrupt?                  |B0
        goto    ISR_ADC         ; no, branch, else                |B0
;
;  test SPI_CS pin (GP3), if high, we should have 16-bit record
;
        btfsc   GPIO,CS         ; SPI chip select rising edge?    |B0
        goto    ISR_SPI_Done    ; yes, branch, else               |B0
;
;  disable ADC interrupts (not enough time to do both ADC
;  and IOC interrupt processing while receiving SPI data)
;
        bcf     INDF,ADIE       ; disable ADC int (PIE1,ADIE)     |B0
;
;  it was an SPI_CLK rising edge and by this time the SPI_CLK
;  pin should be low again so we read GPIO and clear the IOC
;  interrupt flag to avoid processing an SPI_CLK falling edge
;  interrupt when we exit
;
        rrf     GPIO,W          ; put SPI_SI (GP0) bit in Carry   |B0
        rlf     RECL,f          ; add new bit to 16-bit buffer    |B0
        rlf     RECH,f          ;                                 |B0
        bcf     INTCON,GPIF     ; clear IOC interrupt flag        |B0
        retfie                  ; exit ISR                        |B0

How about setting up IOC only on the SPI_CS pin and processing all 16 bits in one operation in the ISR?

Thank you again for the stimulating contribution.

Regards, Mike

 

[polymath]

Mike, K8LH
This is off topic but your nickname contains a comma ',' which the Private Message System considers an illegal character and prevents members sending you a PM.
I sent a email to ARRL regarding this but I don't know if you received it.

Apologies to the rest of you for this 'off topic' posting.

Polymath

 

[emcs51]

hi caproni,
you had test to put the RA4 to VCC to reprogram 4550? please answer! thanks!
i hope your response.

 

[facaf]

Hello everybody. i don't understand the problem with use 7407. the 12f683 and 4066 for what you place that? i made the ICD2 RS232 and i order the 18F4550 to made the ICD2 USB.
My RS232 ICD have a 7407 and MC34063, dont' have a MCP41010 (i can't seel, here, in argentina). work fine in 3,3v mode (debug and program).
the unique problem was with the 74HC126N (have a protection diodes in the pins)
and shift the vdd to 5v. but with two diodes and two resistors at the selection lines work fine).
Best Regards
facaf

 

[potyo]

Also, don't quite understand the function of 4066 in your design.

4066 is to put the pgd, pgc and mclr pins to high impedance state after programming(if you want to use icd2 for programming only).

Suggestion:
Use 74LVC8T245 or 74LVC2T45 to replace 74HCT125 & 74AHC126.

The problem is the avaliability, otherwise thanks for it.

Though with only 18 or so instruction cycles between SPI_CLK rising edges, SPI timing may be a problem.

The code was written between two tests on the faculty, so there was not too many optimization in it.

I fiddled with your code and moved SPI_SI to GP0 to try and improve speed.

Great idea, congratulations.

Hello everybody. i don't understand the problem with use 7407. the 12f683 and 4066 for what you place that? My RS232 ICD have a 7407 and MC34063, dont' have a MCP41010 (i can't seel, here, in argentina). work fine in 3,3v mode (debug and program).

We want to make our clone as much as possible identical to the original, and if it is possible we want to improve it.

The unique problem was with the 74HC126N (have a protection diodes in the pins) and shift the vdd to 5v. but with two diodes and two resistors at the selection lines work fine).

Personally for me this is not a lovely solution, because the voltage on cmos inputs aren't normal logical signals, and i don't like this. Can you check, what is on the pgd and pgc pins, after programming a device? Are the pins in HiZ?

 

[Andy_123]

I am still trying to figure out why two input buffers (74ACHT125) used in parallel?
And in some cases output buffers as well...

Am I missing something?
Do you really need this?

 

[szlovak]

I am still trying to figure out why two input buffers (74ACHT125) used in parallel?
And in some cases output buffers as well...

Am I missing something?
Do you really need this?

In original ICD2 it's used for logic level conversion since it's powered from 5V and rc3-5 in 16f877 are Schmit triggered. And 74HC126 is used to make logic states for target at Vdd_icsp .

But I don't understand what for is the second ICSP socket (or place for it) in this original ICD2 here **broken link removed**