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Programmable delay circuit using mux nand dec enc nand anythig from a cadence lib

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Dino1400

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Delay step using CMOS circuit

Hello all;
i have assigned to design a 40 delay step using NAND NOR any standard cells currently I'm just looking at the big picture that i can start from.

please any suggestions this 40 dealy step may take a 6-bit input to walk through the 40 steps of about 50 ps


thank you in advance
 

Re: Delay step using CMOS circuit

i have lib in cadence that has nand nor mux etc i just need an idea about the design itself how to generate those delay steps. I'm working on a digital design and i need a programmable delay with 40 steps of 25ps second
 

Re: Delay step using CMOS circuit

With stripline or microstrip conductor paths around 20 ps/cm you can design delay lines and select one of 40 lines. However stability of the delay is critically dependant on controlled impedance, layout etc. The delay lines would need to be match terminated to reduce reflections.

Alternatively you can search for stock Inductive delay lines designed usually for PECL in the 20~200 ps step range. in 50 or 100 Ohm.
 

Re: Delay step using CMOS circuit

i have lib in cadence that has nand nor mux etc i just need an idea about the design itself how to generate those delay steps. I'm working on a digital design and i need a programmable delay with 40 steps of 25ps second 65nm global foundries
 

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