processing a buffer in parallel using FPGA

[conoscenza silente]

Hi All
I am doing first steps in FPGA development.
As a starting point I would like to achieve knowledge about how to split a work in parallel sub tasks on a FPGA.

Do you know which VHDL construct or RTL block is used and I should have a look If I have a buffer representing for example an array of numbers that I want to process in parallel tasks?
I hope the question is not too vague..but I am really a newbie..
Kind Regards
CS

 

[fcfusion]

I hope the question is not too vague..but I am really a newbie..

Yes, it's is too vague. Please give a better description of what you intend to do.

 

[TrickyDicky]

It is very vague. But from what you have written - no you would not usually process a buffer of numbers, you usually process a stream of data.

 

[conoscenza silente]

Ok.
Suppose I have a buffer having a message in it so
first 4 bytes a string of 4 character
next 4 bytes a 32 bit integer
next 4 bytes a second string of 4 character
next 4 bytes a second 32 bit integer.

The strings have to be compared against an available dictionnary and the 2 integers have to be used
to make 2 different calculations according any whatever algorithm of function.

On a FPGA do I have to process this buffer of 16 bytes like below or is there something to make the task go in parallel? ( SEQUENTIAL vs PARALLEL processing )
How to approach that? The description below looks more like PIPELINING

// SEQUENTIAL processing
a. read 4 bytes
b. look for item in dictioannary
c. read 4 bytes
d. do calculation
e. read 4 bytes
f. look for item in dictioannary
g. read 4 bytes
h. do calculation

// PARALLEL processing ( like Multithreading )
a. read 4 bytes
b1. read 4 bytes b2. look for item in dictioannary
c1. read 4 bytes c2. do calculation
d1. read 4 bytes d2. look for item in dictioannary
e. do calculation


My question is how to carry these 4 operations in parallel..what are the basic building blocks I have to study/read in order to be able to carry these 4 at the same time.

---------- Post added at 14:00 ---------- Previous post was at 13:50 ----------

Hi TrickyDicky
Thanks for your response. Suppose my data is organized in chunks of 4 bytes this means that I should wait to finish processing the first 4 bytes before move to the second 4 bytes. Am I correct? If processing the first 4 bytes could take an indefinite lot of time how to handle this case? Can I read the next 4 bytes and keep on processing the first 4 somewhere else?

 

[TrickyDicky]

I think your question is still a bit vague. And I think you need to read up on digital logic.
How is your data going to arrive? 4 bytes at a time? plus how big is this "dictionary"? is it just a memory lookup, or is it looking for some kind of similarity?

FPGAs are heavily pipelined, but you often have several pipelines running in parrallel.
Think of an FPGA as a co-processor. It has a single task, but a massive throughput.

 

[conoscenza silente]

Hi TrickyDick

Data might be received either ways i.e. in chunks of 4 or as a single buffer of 16 bytes
and the search in the dictionary will not happen on a simple lookup without
using any comparison.

Can you address me a bit to some good reading on digital logic/design for pipelines
or any other structure for 'parallelism'?

I think is definitely what I was looking for i.e. how to arrange basic
digital pieces ( Flip Flop, D-Latch , etc ) to provide what I need.

 

[conoscenza silente]

Hi
I found this web site. Maybe a starting point to read about pipelines and more basic stuff.

**broken link removed**