LatDrIvE
Member level 4
process translate failed
Hello All
I am having the following problem when i am trying to translate my design using a PPC405 and a opb timer in a xc4vfx12-ff668-10 device...
The output from the ISE is the following:
Applying constraints in "E:/testPCC/testPCC1/data/system.ucf" to the design...
ERROR:NgdBuild:756 - "E:/testPCC/testPCC1/data/system.ucf" Line 15: Could not
find net(s) 'C405RSTCORERESETREQ' in the design. To suppress this error
specify the correct net name or remove the constraint.
ERROR:NgdBuild:756 - "E:/testPCC/testPCC1/data/system.ucf" Line 16: Could not
find net(s) 'C405RSTCHIPRESETREQ' in the design. To suppress this error
specify the correct net name or remove the constraint.
ERROR:NgdBuild:756 - "E:/testPCC/testPCC1/data/system.ucf" Line 17: Could not
find net(s) 'C405RSTSYSRESETREQ' in the design. To suppress this error
specify the correct net name or remove the constraint.
ERRORarsers:11 - Encountered unrecognized constraint while parsing.
ERROR:NgdBuild:19 - Errors found while parsing constraint file
"E:/testPCC/testPCC1/data/system.ucf".
Writing NGDBUILD log file "system_stub.bld"...
Process "Translate" failed
And here is my system.ucf file:
Net sys_clk_pin LOC=AE14;
Net sys_clk_pin IOSTANDARD = LVCMOS33;
Net sys_rst_pin LOC=D6;
Net sys_rst_pin PULLUP;
## System level constraints
Net sys_clk_pin TNM_NET = sys_clk_pin;
TIMESPEC TS_sys_clk_pin = PERIOD sys_clk_pin 10000 ps;
Net sys_rst_pin TIG;
NET "C405RSTCORERESETREQ" TPTHRU = "RST_GRP";
NET "C405RSTCHIPRESETREQ" TPTHRU = "RST_GRP";
NET "C405RSTSYSRESETREQ" TPTHRU = "RST_GRP";
TIMESPEC "TS_RST1" = FROM CPUS THRU RST_GRP TO FFS TIG;
## IO Devices constraints
#### Module RS232_Uart constraints
Net fpga_0_RS232_Uart_RX_pin LOC=W2;
Net fpga_0_RS232_Uart_RX_pin IOSTANDARD = LVCMOS33;
Net fpga_0_RS232_Uart_TX_pin LOC=W1;
Net fpga_0_RS232_Uart_TX_pin IOSTANDARD = LVCMOS33;
I have set in ISE properties to "Allow umatched LOC unconstrates" but nothing happened. Any ideas that might fix the problem? Thanx regards
Hello All
I am having the following problem when i am trying to translate my design using a PPC405 and a opb timer in a xc4vfx12-ff668-10 device...
The output from the ISE is the following:
Applying constraints in "E:/testPCC/testPCC1/data/system.ucf" to the design...
ERROR:NgdBuild:756 - "E:/testPCC/testPCC1/data/system.ucf" Line 15: Could not
find net(s) 'C405RSTCORERESETREQ' in the design. To suppress this error
specify the correct net name or remove the constraint.
ERROR:NgdBuild:756 - "E:/testPCC/testPCC1/data/system.ucf" Line 16: Could not
find net(s) 'C405RSTCHIPRESETREQ' in the design. To suppress this error
specify the correct net name or remove the constraint.
ERROR:NgdBuild:756 - "E:/testPCC/testPCC1/data/system.ucf" Line 17: Could not
find net(s) 'C405RSTSYSRESETREQ' in the design. To suppress this error
specify the correct net name or remove the constraint.
ERRORarsers:11 - Encountered unrecognized constraint while parsing.
ERROR:NgdBuild:19 - Errors found while parsing constraint file
"E:/testPCC/testPCC1/data/system.ucf".
Writing NGDBUILD log file "system_stub.bld"...
Process "Translate" failed
And here is my system.ucf file:
Net sys_clk_pin LOC=AE14;
Net sys_clk_pin IOSTANDARD = LVCMOS33;
Net sys_rst_pin LOC=D6;
Net sys_rst_pin PULLUP;
## System level constraints
Net sys_clk_pin TNM_NET = sys_clk_pin;
TIMESPEC TS_sys_clk_pin = PERIOD sys_clk_pin 10000 ps;
Net sys_rst_pin TIG;
NET "C405RSTCORERESETREQ" TPTHRU = "RST_GRP";
NET "C405RSTCHIPRESETREQ" TPTHRU = "RST_GRP";
NET "C405RSTSYSRESETREQ" TPTHRU = "RST_GRP";
TIMESPEC "TS_RST1" = FROM CPUS THRU RST_GRP TO FFS TIG;
## IO Devices constraints
#### Module RS232_Uart constraints
Net fpga_0_RS232_Uart_RX_pin LOC=W2;
Net fpga_0_RS232_Uart_RX_pin IOSTANDARD = LVCMOS33;
Net fpga_0_RS232_Uart_TX_pin LOC=W1;
Net fpga_0_RS232_Uart_TX_pin IOSTANDARD = LVCMOS33;
I have set in ISE properties to "Allow umatched LOC unconstrates" but nothing happened. Any ideas that might fix the problem? Thanx regards