A power MOS for LDO
Dear All :
I Summary my measure result , I don't add the current buffer bwtween the OP and Si2301 , Now I mean the Open loop of OP , The Behavior ir right , But When I coonet to the close loop , the Behavior is wrong , the V+ is 1.8v , V- is 1.2 form Bandgap , the the the out of OP is 0.777v , So that I measure the stand alone the PMOS , I add a big resistor(7M) in the Gate , and I force the volatge(2.2) to Resistor , then measure the Gate volatge is 0.77v, It seem the Gate have some leakage cuurent , That I measure it , My questions is How do force my LDO to correct DC mode , Thanks