ombadei
Member level 3
Hi,
I'm using ISE10.1 to code my VHDL and program the resultant bit file in a spartan kitset.
I have many state machines declared in my application. When i include variable integers in my loop control, the result that i obtain in my state machine has unpredictable results.
Any rationale reason to it?
THanks
I'm using ISE10.1 to code my VHDL and program the resultant bit file in a spartan kitset.
I have many state machines declared in my application. When i include variable integers in my loop control, the result that i obtain in my state machine has unpredictable results.
Any rationale reason to it?
THanks