Problem with importing Verilog to Cadence as it only creates symbol and functions

[letan]

Hi everybody!

I import verilog use Cadence but it only create symbol and funtional. I don't know why?

And I need a book abour verilog logic synthesis. May anyone help me?

Thanks

 

[kishore2k4]

Re: Help me!

If you alrady familiar with Verilog then take a look at "Verilog HDL Synthesis - A Practical Primer", its one of the good books that I've read so far.

 

[ngocthao]

Re: Help me!

Hi letan!

You should guide Verilog in at Cadence. If you want to have schematic then your verilog netlist is structural cell, not behavial cell, and ....

I just read it because I don't know it right......