tutorial clock cts eco
The problem is like this :
I have a source clock (called ClockIn).It generates two clock for different clock domain.One is faster (called ClockFast),the other is slower (called ClockSlow).These two clocks is both configurable ,that is to say they both have a divide parameter with the ClockIn.
To simplify the question ,I set the ClockFast the same frequency as ClockIn,and set the ClockSlow half speed of the ClockIn.
When I do CTS with Astro 0309, I found that it can't get the correct clock tree.The clock tree stops at the FlipFlop(MyDividerFF) which is used to generate the ClockSlow.I generate the half speed clock simply by using this FlipFlop to feedback the output pin (Q) to its input pin (D),and set the clock of the FlipFlop (CK) with the ClockIn.
I tried to ignore input pin of MyDividerFF.Astro still can't get the clock tree from the CK to the Q, is there any problem in my design?
Because the domains of ClockFast and the ClockSlow have to exchange data frequently, so I want to do the two clock stimutenaously. What should I do?
Thank u !