problem: multiply two fractional numbers in verilog

[mohsen p]

I have to multiply two fractional numbers of 42 bits in verilog. I am using the fixed point (Q12.30). Now my result is wrong.

part of my code:

module my_name (out,Clk);
    input Clk;
    output reg signed [83:0] out;  //(Q24.60)
    reg signed [41:0] in1;         //(Q12.30)
    reg signed [41:0] in2;         //(Q12.30)
  
    always @(posedge Clk)
        out <= in1 * in2;
endmodule

for example if in1=-2 & in2=-1.89652 then out=3.79304 , but my result is -15956.351736 !!!

in modelsim:
-2 is 42'b111111111110_000000000000000000000000000000
-1.89652 is 42'b111111111110_00011010011111011010111100000
-15956.351736 is 111111111100000110101011_101001011111010010100010000000000000000000000000000000000000 (WRONG)

plz tell me how multiply two fractional numbers.
thanks.

 

[syedshan]

hi first of all your value
-1.89652 is 42'b111111111110_00011010011111011010111100000

It should be something like => 111....111_11 1001 0110 0000 1001 0101 0110 1100

since 0.89652 * 2^30 = 962631020)base10 => 11 1001 0110 0000 1001 0101 0110 1100)base_2

does not seem right,
Try doing this