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[SOLVED] Problem in BGR Simulation: DC and Transient

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nguyenvanthien

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Hi all,
Now, I'm studying the paper: A CMOS bandgap reference with high PSRR and improved temperature stability for SOC applications.
I have problems: 1/ At t=0 (oC) When I simulated DC response, input voltage opamp(v1=v2) = 7mV. So, reference voltage isn't true.
2/ But, at t=0 (oC), when I simulated transient response ( by Vsource is ramp), input voltage =710 mV. Then, reference voltage is true.
How can I solve this problem?
 

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Doesn't it need a startup circuit to trigger the BGR during bring up? You need to put a start up circuit as shown the paper attached. The BGR without a start up circuit has two stable states (1. opamp inputs at proper voltages. 2. opamp inputs at zero). Once you power it up, the BGR might go to either of the states purely based on probability (which depends the initial charges stored before the BGR was power down). So it is very important to include a startup circuit for this kind of BGR architectures.
 
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AMS012, Thank you very much! I fininshed DC simulation. The results are very good.
Now, I have the problem in PSRR simulation.
I understand that PSRR is power supply reject ratio. So, I check it by adding sine signal on voltage supply and watch output voltage. It has ripple. But I'd like to show PSRR with frequency which you usually see on the IEEE paper.
Can you suggest me about test circuit for PSRR?
I'm looking forward to your detail answer!
 

Add an AC source (Magnitude=1) in series with the DC power supply. And do the AC response analysis (just as you would do in case of AC response of an opamp) across frequency.
 

I greatly appreciate your answer. PSRR is about -82 dB from DC to -42 dB at 1Khz.
Thank you again!
 

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