we are now designing a differencial voltage reference, where the voltage reference is 1.97V and 0.97V. What should we care about when we design the buffer? and what's the request about the buffer if the differencial voltage reference
is used in a ADC? Thank you .
Re: problem about the buffer in differencial voltage referen
lgqfang said:
we are now designing a differencial voltage reference, where the voltage reference is 1.97V and 0.97V. What should we care about when we design the buffer? and what's the request about the buffer if the differencial voltage reference
is used in a ADC? Thank you .