surisingh
Member level 1
Hi,
I am working on the Sub System level verification where we have USB30 Host and USB30 Device controllers. We have 2 define files called usb30h_defines.sv and usb30d_defines.sv for Host and Device respectively. In both the files we have 4-5 defines with the same name, for example, we have USB3_RXPIPE define in both defines.sv. I asked the designer to prefix the defines so that it can be used in the environment without any errors. But he says, For the RTL, he can just compile each controller with its own defines and then undefined them.
My question is:
Is there any way to do something similar for the testbench components? How can I use the define if it is not prefixed. I will exercise both the controllers, so there is no IFDEF.
Thanks
Suresh
I am working on the Sub System level verification where we have USB30 Host and USB30 Device controllers. We have 2 define files called usb30h_defines.sv and usb30d_defines.sv for Host and Device respectively. In both the files we have 4-5 defines with the same name, for example, we have USB3_RXPIPE define in both defines.sv. I asked the designer to prefix the defines so that it can be used in the environment without any errors. But he says, For the RTL, he can just compile each controller with its own defines and then undefined them.
My question is:
Is there any way to do something similar for the testbench components? How can I use the define if it is not prefixed. I will exercise both the controllers, so there is no IFDEF.
Thanks
Suresh