sunidrak
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hi
Can any body please explain
Pre and post Incrment in system verilog and reason for this output
module increment;
integer i=3,z;
initial
begin
z=i++/i;
$display("i=%d,z=%d "i,z);
end
endmodule
Output
# i=4
# z=0
Regards
SUNIL
Can any body please explain
Pre and post Incrment in system verilog and reason for this output
module increment;
integer i=3,z;
initial
begin
z=i++/i;
$display("i=%d,z=%d "i,z);
end
endmodule
Output
# i=4
# z=0
Regards
SUNIL