mush
Junior Member level 2

Hello all,
I was looking at the design files of Xilinx AC701 board and I have some questions. In the picture, in the A schematic what is the functionality of that circuit? FPGA_DONE is not an open drain but a bidirectional IO. What is going on when is set as output? In B, why is using the extra power through R193? Isn't the CTRL2_PGOOD (14 from 3.3V FPGA IO) enough to trigger the FET? And finally the use of R22 in C? For noise filtering?
Regards
I was looking at the design files of Xilinx AC701 board and I have some questions. In the picture, in the A schematic what is the functionality of that circuit? FPGA_DONE is not an open drain but a bidirectional IO. What is going on when is set as output? In B, why is using the extra power through R193? Isn't the CTRL2_PGOOD (14 from 3.3V FPGA IO) enough to trigger the FET? And finally the use of R22 in C? For noise filtering?
Regards