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Postsim flow questions:

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jcpu

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postsim hspice

Hi, when working under Cadence Analog Design Evironment (ADE),
after layout completed,
we do Calibre LPE to extract parasitic for postsimulation.
The question is,
the output format we get is HSPICE format.

So, now the output netlist become HSPICE netlists,
and we have to rebuild all test-bench under HSPICE evironment
instead of original ADE set-ups.
And painful thing is that,
ADE test-benches do not correctly convert to HSPICE format
when we do File-->Export-->CDL out.

Can someone teach me
if we can somehow feed LPE output netlist back to ADE
so that we can use the same ADE testbench for presim and postsim.

Thanks in advance.
 

Hughes

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Use standalone hspice for post-layout simulation. You can use the same stimulus file for hspiceS in ADE and standalone hspice. If signal names do not contain special characters (such as + or -), and you select hierarchy netlist mode in ADE, then the same stimulus file can be used in ADE.
 

    jcpu

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jcpu

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Dear Sir:

I have went over Cadence "HSPICE Interface Referece Manual"
Still have a question:
By
If signal names do not contain special characters (such as + or -), and you select hierarchy netlist mode in ADE, then the same stimulus file can be used in ADE.
Do you mean that under Composor environment
when we have a subcircuit which is in Hspice netlist format,
we can put that subcircuit in ? View,
build a Symbol View for it,
then we can use it by Symbol in other Composor schematics
and do simulation in ADE just like any other hierarchical circuits?
 

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No. I ever tried to do so, but failed. ADE automatically adds a suffix to the subckt name.

But you can use the same stimulus file for schematic-level simulation (by ADE) and post-layout simulation (by standalone hspice). The stimulus file can be a text file entered by you (and added in the "Setup Environment" dialog of ADE) or generated by ADE.
 

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