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post-layout simulation using ocean, errors

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ansonyeap

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Hi all, recently i doing my post-layout simulation using ocean. the simulator that i used is spectre.

when the process is running, a notice from spectre pop up. the notice is as shown below.

Notice from spectre during topology check.
No DC path from node `I0.N_NET36_c_4352_p' to ground, Gmin installed to
provide path.
No DC path from node `I0.x_PM_NHP_REV1%NET30.259' to ground, Gmin installed
to provide path.
No DC path from node `I0.NET30' to ground, Gmin installed to provide path.
No DC path from node `I0.x_PM_NHP_REV1%NET36.50' to ground, Gmin installed
to provide path.
Warning from spectre during heuristic topology check - set topcheck=fixall to
fix all floating nodes.
No DC path from node `I0.x_PM_NHP_REV1%VDD.7159' to ground.


And when the simulation finished, all the result i get vary a lot from what i expected. what seem to be the problem and how to solve the above problem? furthermore, i check already my design, my design not suppose to be connected to ground for the corresponding nodes shown in the notice.
 

OCEAN simulation errors

In order to calculate the node voltages u need a ground reference. Like for example u have to capacitors connected in series then the node between them is floating in DC analysis. But to find the initial condition the tool must have a voltage there. So it assumes the presence of a high value resistor from that node to ground. Gmin = 1/R.
So check the value of Gmin in your script file, which if u dont specify will be a default value. Typically the value will be in the range of pS. U can check the value of Gmin the tool uses in your log file.
If the Gmin ur simulator using is high make it a low value and rerun the simulation
 

Re: OCEAN simulation errors

As it was said above these are usual messages and the installed gm should not cause a problem. I am sure that the problem lays somewhere else. (for example the parasitics could modify the frequency response or even the bias point)
 

OCEAN simulation errors

What you are showing is not an error but just a notice. As the previous two posters said, there are floating nets in your post-layout simulations. This is NOT the cause of your variations in the simulation results.

If I were you, I would check the effect of parasitic capacitance that you did not consider in the schematic simulations.
 

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