student14
Member level 2
Hi
I am using cadence software and using silterra 130nm and successfully designed the layout but I am unable to run the post simulation layout. I am using my test bench using symbol of schematic and opened the config view of the test bench. but when I am simulating the post layout simulation it gives error. The error is
C1 is undefined model
C2 is undefined model
C3 is undefined model
.
.
.
.
C171 is undefined model
These capacitors from C1-C171 are parasatic capacitances from the extracted view. How can I solve this sissue? Can some one help?
Second method of post layout simulation what I am using is:The schematic with which I have designed the layout at the same shematic page I have directly placed the signals, vdd and gnd and run the post simulation layout by ADEL window--design---enviroment-- in switch view option I have placed av_extracted spectre cmos_csh schematic. and run the simulation but it is not picking the extracted view its only simulating the simple schematic instead of extracted view? Can some one help whats the issue?
Thanks
I am using cadence software and using silterra 130nm and successfully designed the layout but I am unable to run the post simulation layout. I am using my test bench using symbol of schematic and opened the config view of the test bench. but when I am simulating the post layout simulation it gives error. The error is
C1 is undefined model
C2 is undefined model
C3 is undefined model
.
.
.
.
C171 is undefined model
These capacitors from C1-C171 are parasatic capacitances from the extracted view. How can I solve this sissue? Can some one help?
Second method of post layout simulation what I am using is:The schematic with which I have designed the layout at the same shematic page I have directly placed the signals, vdd and gnd and run the post simulation layout by ADEL window--design---enviroment-- in switch view option I have placed av_extracted spectre cmos_csh schematic. and run the simulation but it is not picking the extracted view its only simulating the simple schematic instead of extracted view? Can some one help whats the issue?
Thanks
