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PMOS for ESD protection????

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ljy4468

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Hi
I've a question about attatched PMOS.
left side & right side is VCC.
i.e. VCC line through this PMOS.

It won't operate because all pins are short.

But someone told me it is for ESD...
But I cannot understand.

Anyone helps me.

Regards.
 

Maybe using diode reverse breakdown region between n-well/p-sub when vcc overshoot?
 

Hello,

If it is PMOS Source ,drain ,bulk : VCC ,Substrate : Ground .

ESD can be positive strike as well as negative Strike .

If it is positive strike ,well to substrate junction will be broke down ,ESD charge will be bypassed to ground.

If it is negative strike ,well to substrate junction will be forward biased ,ESD charge will be bypassed to ground.

thanks,
 

i think it is for power supply noise consideration and ESD

the MOS is connected to VCC, and the p-sub is connected to VSS.
it just use the NWELL and the sub as a inversly PN-junction. so that when power noise or ESD charge voltage more than inversly PN-junction voltage, it can filter the high voltage votage,

i think it usually used in long power line condition.


ljy4468 said:
Hi
I've a question about attatched PMOS.
left side & right side is VCC.
i.e. VCC line through this PMOS.

It won't operate because all pins are short.

But someone told me it is for ESD...
But I cannot understand.

Anyone helps me.

Regards.
 

Shorting all the pins, then the least resistance path of flow of current is the wire itself...PMOS is of no use....
 

Faizan Jawaid said:
Shorting all the pins, then the least resistance path of flow of current is the wire itself...PMOS is of no use....

It's right!
This PMOS will not be used as ESD device unless the metal between G and D is broken.
 

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