Plz Help me...output file format

[ahmedtr9989]

output file format

i want to know the different between the following output files and their extensions:
__________________________
|output file format description
|_________________________
| rtl :
| rtl netlist :
| hspice :
| hspice netlist:
| gate level netlist :
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[lakshman.ar]

rtl : it will ur code .v/.vhdl
rtl netlist : its the output of the synthesis process for which rtl will be the input

gate - level - netlist : ur design in the form of gates ( std cell provided by the foundry) only