Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Plz Help me...output file format

Status
Not open for further replies.

ahmedtr9989

Newbie level 4
Joined
Dec 18, 2008
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,304
output file format

i want to know the different between the following output files and their extensions:
__________________________
|output file format description
|_________________________
| rtl :
| rtl netlist :
| hspice :
| hspice netlist:
| gate level netlist :
-------------------------------------
 

lakshman.ar

Member level 5
Joined
Nov 29, 2006
Messages
88
Helped
12
Reputation
24
Reaction score
4
Trophy points
1,288
Location
Bangalore
Activity points
1,849
rtl : it will ur code .v/.vhdl
rtl netlist : its the output of the synthesis process for which rtl will be the input

gate - level - netlist : ur design in the form of gates ( std cell provided by the foundry) only
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top