PLL simulation with Cadence

[christon]

cadence pll simulation

Hi,

When I simulate a PLL in Cadence spectre ADE, it runs too slow (about one day for a 20us tran simulation) and takes up a large space (up to 20GB).

So, how can I avoid this problem? If I use AMS or verilog-A, the result is OK? I mean the phase noise and jitter etc. are the same as I use ADE?

Thanks in advance ^_^

 

[yibinhsieh]

pll simulations in cadence

It is very diffucult to simulate the PLL in cadence system expecially for the case of high N value.

Instead, you can use verilog-A to model the VCO with its phase noise and to model other components. Then simulate PLL, it will be good.

But you need to make sure your modeling is correlated to real circuit.

For phase noise modeling, usually you can use a random number to model it.

 

[christon]

Thanks very much.
I gonna try it.