d_sl4y3r
Newbie level 3
Is it possible to determine the phase error of a PLL in steady state knowing only:
- open loop dc gain value (kv)
- vco gain (kd)
- the phase detector is a 4 quadrant multiplier
- open loop dc gain value (kv)
- vco gain (kd)
- the phase detector is a 4 quadrant multiplier