promach
Advanced Member level 4
Why "not enough DC voltage to drive the loop toward lock" ?
Why "little symmetry" ?
Could anyone elaborate with some maths expressions ?
Note: Screenshot extracted from book "Monolithic Phase-Locked Loops and Clock Recovery Circuits: Theory and Design"
Why "little symmetry" ?
Could anyone elaborate with some maths expressions ?
Note: Screenshot extracted from book "Monolithic Phase-Locked Loops and Clock Recovery Circuits: Theory and Design"