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Pipeline ADC Gain stage

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suhas_shiv

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Hi All,
I am designing the gain stage for the pipeline ADC. I need a gain of 2 using series cap and feedback cap. Won't the series cap block the DC voltage from voltage source needed to bias the input transistors of the opamp? So how do I bias the opamp then?

Thanks
 

you can refer Abo's paper!
 

During sampling, you're supposed to pull the Opamp input terminals to an AC ground (which is your input common mode DC value).
 

you should learn the switch capacitor circuit principle firstly, i think chapter 9 in allen's book is a good startpoint.
 

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