pins of symbol and layout do not match

Status
Not open for further replies.
A

abdoboua

Junior Member level 1
Joined
Mar 15, 2019
Messages
17
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
138
I encountered this problem when I tried to generate layout from schematics automaticaly.





after doing connctivity > update > binding I got this result
Please help me to solve the problem.Your help appreciated
 

Why don't you use directly Layout-XL-->Update ?? What is Binding for ?
 

it tells me that the symbol pins (G D S B) don't correspond to those of the layout(p D S)


I don't know how to update pins to match them
 

Is that PDK complete ?? It ought to be..Otherwise there is no sense to use it.
You cannot make them a pair ( schematic and layout views ) if there is not a corresponding.Either there is an installation error ( missing script or skill function etc.) or the version of Virtuoso layout Editor is not compatible.Have you ever checked primitive layout of the transistor ?? You should see that the pins are there..
 

conserning the PDK, the TechLib file contains just layouts ,and schematics are in the NCSU_Devices_FreePDK45 folder, this might be the problem, so I copied the schematics to each cell in the TechLib.
conserning the skill function I get errors in WIC (photo)
for the primitive layout I think It doesn't show pins ,but schematics show them, here is an example for NMOS_VTL
Thank you for your time.
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…