Pic18f4550 adc problem

[pratheeshprm143]

Hai, I have some problems in my adc.

my adc is not responding for the following problem, I don't understand where is thee problem. my code is here.

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Code C - [expand]
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// PIC18F4550 Configuration Bit Settings
 
#include <p18F4550.h>
 
// CONFIG1L
#pragma config PLLDIV = 1       // PLL Prescaler Selection bits (No prescale (4 MHz oscillator input drives PLL directly))
#pragma config CPUDIV = OSC1_PLL2// System Clock Postscaler Selection bits ([Primary Oscillator Src: /1][96 MHz PLL Src: /2])
#pragma config USBDIV = 1       // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes directly from the primary oscillator block with no postscale)
 
// CONFIG1H
#pragma config FOSC = EC_EC     // Oscillator Selection bits (EC oscillator, CLKO function on RA6 (EC))
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
 
// CONFIG2L
#pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOR = ON         // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 3         // Brown-out Reset Voltage bits (Minimum setting)
#pragma config VREGEN = OFF     // USB Voltage Regulator Enable bit (USB voltage regulator disabled)
 
// CONFIG2H
#pragma config WDT = ON         // Watchdog Timer Enable bit (WDT enabled)
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)
 
// CONFIG3H
#pragma config CCP2MX = ON      // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON      // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)
#pragma config LPT1OSC = OFF    // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
 
// CONFIG4L
#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = ON         // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled)
#pragma config ICPRT = OFF      // Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit (ICPORT disabled)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
 
// CONFIG5L
#pragma config CP0 = OFF        // Code Protection bit (Block 0 (000800-001FFFh) is not code-protected)
#pragma config CP1 = OFF        // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected)
#pragma config CP2 = OFF        // Code Protection bit (Block 2 (004000-005FFFh) is not code-protected)
#pragma config CP3 = OFF        // Code Protection bit (Block 3 (006000-007FFFh) is not code-protected)
 
// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) is not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM is not code-protected)
 
// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (000800-001FFFh) is not write-protected)
#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected)
#pragma config WRT2 = OFF       // Write Protection bit (Block 2 (004000-005FFFh) is not write-protected)
#pragma config WRT3 = OFF       // Write Protection bit (Block 3 (006000-007FFFh) is not write-protected)
 
// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot block (000000-0007FFh) is not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM is not write-protected)
 
// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection bit (Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection bit (Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks)
 
// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks)
 
 
//////////////////////////////////////////////////////////////////////configuration////////////////////////////////////////////////////////////
 
#include <p18f4550.h>
#define LCD PORTB
#define RS PORTCbits.RC0
#define EN PORTCbits.RC1
 
int i;
void delay(int);
void lcdcmd(int);
void lcddata(int);
void ascii(int);
 
void main(void)
{
    TRISD=0x00;
    PORTD=0x00;
    ADCON0=0xC1;
    ADCON1=0x00;
    ADCON2=0x35;
    TRISAbits.TRISA0=0;
    TRISB=0x00;
    TRISC=0x00;
    lcdcmd(0x38);
    delay(100);
    lcdcmd(0x0e);
    delay(100);
    lcdcmd(0x01);
    delay(100);
    lcdcmd(0x06);
    delay(100);
    lcdcmd(0x80);
    delay(100);
 
    lcddata('T');
    delay(500);
    lcddata('e');
    delay(500);
    lcddata('m');
    delay(500);
    lcddata('p');
    delay(500);
    lcddata(':');
 
    while(1)
    {
    delay(100);
    ADCON0bits.GO=1;
    delay(100);
    while(ADCON0bits.DONE==1);
    PORTD=ADRESH;
    ascii(ADRESH);
    delay(100);
    }
 
 
}
void delay(int d)
{
    for(i=0;i<d;i++)
    {
    }
}
void lcdcmd(int cmd)
{
    LCD=cmd;
    RS=0;
    EN=1;
    delay(200);
    EN=0;
}
 
void lcddata(int data)
{
    LCD=data;
    RS=1;
    EN=1;
    delay(200);
    EN=0;
 
}
void ascii(int adc)
{
    int adccopy,adc1;
    adccopy=adc;
    adc=adc%10;
    adc1=adc+48;
    lcddata(adc1);
    adc=adccopy;
    adc=adc/10;
    adc=adc+48;
    lcddata(adc);
    lcdcmd(0x85);
    delay(1000);
}

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Is anybody knows the problem please help me...............................
thanks