there is no way to turn off BOTH MOSFETS in a single phase at the same time
Yes, there is. Post your complete project and I will fix the code.
#include <xc.h>
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
// CONFIG1H
//#pragma config OSC = HS // Oscillator Selection bits (HS oscillator)
#pragma config OSC = IRCIO // Oscillator Selection bits (Internal oscillator block, port function on RA6 and port function on RA7)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal External Oscillator Switchover bit (Internal External Switchover mode disabled)
// CONFIG2L
#pragma config PWRTEN = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOREN = OFF // Brown-out Reset Enable bits (Brown-out Reset disabled)
// BORV = No Setting
// CONFIG2H
#pragma config WDTEN = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)
#pragma config WINEN = OFF // Watchdog Timer Window Enable bit (WDT window disabled)
// CONFIG3L
#pragma config PWMPIN = OFF // PWM output pins Reset state control (PWM outputs disabled upon Reset (default))
#pragma config LPOL = HIGH // Low-Side Transistors Polarity (PWM0, 2, 4 and 6 are active-high)
#pragma config HPOL = HIGH // High-Side Transistors Polarity (PWM1, 3, 5 and 7 are active-high)
#pragma config T1OSCMX = OFF // Timer1 Oscillator MUX (Standard (legacy) Timer1 oscillator operation)
// CONFIG3H
#pragma config FLTAMX = RC1 // FLTA MUX bit (FLTA input is multiplexed with RC1)
#pragma config SSPMX = RC7 // SSP I/O MUX bit (SCK/SCL clocks and SDA/SDI data are multiplexed with RC5 and RC4, respectively. SDO output is multiplexed with RC7.)
#pragma config PWM4MX = RB5 // PWM4 MUX bit (PWM4 output is multiplexed with RB5)
#pragma config EXCLKMX = RC3 // TMR0/T5CKI External clock MUX bit (TMR0/T5CKI external clock input is multiplexed with RC3)
#pragma config MCLRE = OFF // MCLR Pin Enable bit (Disabled)
// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF // Low-Voltage ICSP Enable bit (Low-voltage ICSP disabled)
// CONFIG5L
#pragma config CP0 = OFF // Code Protection bit (Block 0 (000200-000FFFh) not code-protected)
#pragma config CP1 = OFF // Code Protection bit (Block 1 (001000-001FFF) not code-protected)
#pragma config CP2 = OFF // Code Protection bit (Block 2 (002000-002FFFh) not code-protected)
#pragma config CP3 = OFF // Code Protection bit (Block 3 (003000-003FFFh) not code-protected)
// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot Block (000000-0001FFh) not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000200-000FFFh) not write-protected)
#pragma config WRT1 = OFF // Write Protection bit (Block 1 (001000-001FFF) not write-protected)
#pragma config WRT2 = OFF // Write Protection bit (Block 2 (002000-002FFFh) not write-protected)
#pragma config WRT3 = OFF // Write Protection bit (Block 3 (003000-003FFFh) not write-protected)
// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block (000000-0001FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000200-000FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (001000-001FFF) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (002000-002FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (003000-003FFFh) not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot Block (000000-0001FFh) not protected from table reads executed in other blocks)
#define _XTAL_FREQ 8000000
#include <stdio.h>
#include <stdlib.h>
unsigned char overrides[6];
unsigned char override_values[6];
void main(int argc, char** argv) {
int contador = 0;
OSCCONbits.IRCF0 = 1;
OSCCONbits.IRCF1 = 1;
OSCCONbits.IRCF2 = 1; //8Mhz
OSCCONbits.SCS1 = 1; //Internal oscillator block
TRISDbits.RD2 = 0;
PORTDbits.RD2 = 0;
PWMCON0bits.PWMEN2 = 1;
PWMCON0bits.PWMEN1 = 0;
PWMCON0bits.PWMEN0 = 0;
PWMCON0bits.PMOD3 = 0;
PWMCON0bits.PMOD2 = 0;
PWMCON0bits.PMOD1 = 0;
PWMCON1bits.OSYNC = 1;
PTPERH = 0;
PTPERL = 99;
PDC0L = 0b00100100;
PDC0H = 0b00000000;
PDC1L = 0b00100100;
PDC1H = 0b00000000;
PDC2L = 0b00100100;
PDC2H = 0b00000000;
PTCON0bits.PTMOD1 = 0;
PTCON0bits.PTMOD0 = 0;
DTCONbits.DT0 = 0;
DTCONbits.DT1 = 1;
DTCONbits.DT2 = 1;
//Step 1
overrides[0] = 0b00000011;
override_values[0] = 0b00000100;
//Step 2
overrides[1] = 0b00000011;
override_values[1] = 0b00010000;
//Step 3
overrides[2] = 0b00001100;
override_values[2] = 0b00010000;
//Step 4
overrides[3] = 0b00001100;
override_values[3] = 0b00000001;
//Step 5
overrides[4] = 0b00110000;
override_values[4] = 0b00000001;
//Step 6
overrides[5] = 0b00110000;
override_values[5] = 0b00000100;
OVDCOND = overrides[contador];
OVDCONS = override_values[contador];
contador++;
PTCON1bits.PTEN = 1;
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
while(1)
{
OVDCOND = overrides[contador];
OVDCONS = override_values[contador];
if (contador == 5)
{
contador = 0;
}
else
{
contador++;
}
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
__delay_ms(10);
}
}
https://www.edaboard.com/threads/361796/#post1549322
https://www.youtube.com/watch?v=uqzOQGiwGnE
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