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pic 18f4520 internal 32mhz oscillator

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raman00084

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i am using pic 18f4520 ic in internal oscillator mode 32mhz. can any one tel me which is safe for the chip internal are external crystal oscillator. what are the advantages and disadvantage of using internal oscillator?


regards
kalyan
 

hi,
I use the internal 8MHz and the PLL to give 32MHz, its also possible to tune the internal oscillator.
Its saves the cost of an external crystal and two low value caps.
E
 
hi,
I use the internal 8MHz and the PLL to give 32MHz, its also possible to tune the internal oscillator.
Its saves the cost of an external crystal and two low value caps.
E

if i've understood you correctly, you were saying that internal RC frequency is 8MHz, and you can get 32MHz with the help of PPL?
Does the oscillator that we solder on pcb besides pic generate the external frequency?
 

You can buy very precise external oscillators if high precision is required. Internal oscillators are good for general use, however when it comes to rocket science - You need to have an oscillator that can stay stable (keep same frequency) while operated in different temperatures; internal oscillators tend to change frequency when temperature changes.

Another reason for external oscillator is different frequencies (not necessarily higher), say You want to get specific baud rate with 0 error (which is not available with internal oscillator).

Regarding PWM, I've never heard that external oscillators cannot be used as a clock for that. When You think of it, recently, uCs did not have internal oscillators at all, but there was PWM. Don't know, probably depends on uC and oscillator itself.
 

Does the oscillator that we solder on pcb besides pic generate the external frequency?

If you use a external crystal the PIC can use the PLL to multiply the crystal frequency by 4.

An 8MHz xtal *4 =32MHZ or a 10MHz xtal *4 =40MHz.

If you choose the internal oscillator, its possible tune the freq by using OSCTUNE register.

E
 

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hi yao,
Ref your PM about 48MHz operation for the 18F4520, you MAY be able to overclock the 4* PLL by using a 12MHz external crystal.?
If you try it, lets know what you find.

E
 

hi yao,
Ref your PM about 48MHz operation for the 18F4520, you MAY be able to overclock the 4* PLL by using a 12MHz external crystal.?
If you try it, lets know what you find.

E

Hi, I think i got the answer and it is clear now. My pic is 18F2550 in fact. I solder an oscillator(resonator actually) beside my pic. The oscillator generates 20MHz. The teacher said that our board is connected to usb to the computer, so the pic works at 48MHz. The bootloader deals with the transfer. In fact the bootloader is designed and the code has been written into our pic. I dont how, but the teacher just told me that.
By the way, every instruction needs 4 clock pulse to implement, so the instruction speed is 12MHz.
 

Hi, I think i got the answer and it is clear now. My pic is 18F2550 in fact. I solder an oscillator(resonator actually) beside my pic. The oscillator generates 20MHz. The teacher said that our board is connected to usb to the computer, so the pic works at 48MHz. The bootloader deals with the transfer. In fact the bootloader is designed and the code has been written into our pic. I dont how, but the teacher just told me that.
By the way, every instruction needs 4 clock pulse to implement, so the instruction speed is 12MHz.


Hi,

Not a point I have proven in circuit myself, but for USB operation the stability of a crystal is specified; they typically have an accuracy of 30 ppm. = 600hz with a 20Mhz crystal.

You say you have used a resonator -assume you do mean a Ceramic resonator, but even good quality ones are only accurate to within +- 0.5% so at 20mhz that means and error rate of up to +- 100,000 hz.

Not sure if that is good enough for reliable USB use, perhaps others can say if you really need to replace it with a crystal .
 

hi Yao,
If the crystal is 20MHz, the 18F2550, will divide it by 5, as the PLL requires a 4MHz input.
This is the CONFIG I use for my HID USB, it works OK.
E.

Code:
	LIST p = 18F2550, r = dec, w = -311, f = inhx32
	INCLUDE "P18F2550.INC" ; MPASM Header
	errorlevel -302, -207

CONFIG PLLDIV=5,CPUDIV=OSC1_PLL2,USBDIV=2,FOSC=HSPLL_HS,IESO=OFF
CONFIG VREGEN=ON,CCP2MX=ON,WDT=OFF,WDTPS=32768,PBADEN=OFF ,PWRT=OFF,MCLRE=ON
CONFIG LPT1OSC=OFF,BOR=ON,BORV=2,STVREN=ON,LVP=OFF,ICPRT= OFF,XINST=OFF,DEBUG=OFF
CONFIG WRTB=ON
 
EEPROM_START EQU 0F00000h
BLOCK_SIZE EQU 32

PLLDIV=5 ' This sets the PLL Postscaler to divide the primary osc input by 5
providing 4MHz to the 96MHz PLL. The 96MHz PLL input must always be 4MHz
as shown in the data sheet.

CPUDIV=OSC1_PLL2 ' This sets the PLL Postscaler to divide the 96MHz PLL
output by 2 providing a 48MHz clock to the CPU.

USBDIV=2 ' This divides the 96MHz PLL output by 2 providing 48MHz to the
USB core.

FOSC=HSPLL_HS ' This enables HSPLL for high-speed crystal/resonator.
 

Hi,

Not a point I have proven in circuit myself, but for USB operation the stability of a crystal is specified; they typically have an accuracy of 30 ppm. = 600hz with a 20Mhz crystal.

You say you have used a resonator -assume you do mean a Ceramic resonator, but even good quality ones are only accurate to within +- 0.5% so at 20mhz that means and error rate of up to +- 100,000 hz.

Not sure if that is good enough for reliable USB use, perhaps others can say if you really need to replace it with a crystal .

You are right. Indeed, the error is so large. But i dont know how the coach manage it. Actually I am a beginner of the pic18.

- - - Updated - - -

hi Yao,
If the crystal is 20MHz, the 18F2550, will divide it by 5, as the PLL requires a 4MHz input.
This is the CONFIG I use for my HID USB, it works OK.
E.

Code:
	LIST p = 18F2550, r = dec, w = -311, f = inhx32
	INCLUDE "P18F2550.INC" ; MPASM Header
	errorlevel -302, -207

CONFIG PLLDIV=5,CPUDIV=OSC1_PLL2,USBDIV=2,FOSC=HSPLL_HS,IESO=OFF
CONFIG VREGEN=ON,CCP2MX=ON,WDT=OFF,WDTPS=32768,PBADEN=OFF ,PWRT=OFF,MCLRE=ON
CONFIG LPT1OSC=OFF,BOR=ON,BORV=2,STVREN=ON,LVP=OFF,ICPRT= OFF,XINST=OFF,DEBUG=OFF
CONFIG WRTB=ON
 
EEPROM_START EQU 0F00000h
BLOCK_SIZE EQU 32

PLLDIV=5 ' This sets the PLL Postscaler to divide the primary osc input by 5
providing 4MHz to the 96MHz PLL. The 96MHz PLL input must always be 4MHz
as shown in the data sheet.

CPUDIV=OSC1_PLL2 ' This sets the PLL Postscaler to divide the 96MHz PLL
output by 2 providing a 48MHz clock to the CPU.

USBDIV=2 ' This divides the 96MHz PLL output by 2 providing 48MHz to the
USB core.

FOSC=HSPLL_HS ' This enables HSPLL for high-speed crystal/resonator.

Hi,esp1! I think the coach has written some code like yours into our pic. Every time i write some code like config, and compiler will pop up a dialog asking me if i really want to do so. Every time i click no, because i have to use this pic to do the lab. I don't want to be upset because of settings.

Well, as a beginner, i am really curious about the how the code is written into our pic? I have no chance to see that. Maybe I will get to know at the end of this course.
Thanks for you reply!
 

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