Aug 19, 2013 #1 K karthik.venkata2020 Newbie level 4 Joined Aug 19, 2013 Messages 5 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 34 can any one please tell me about smart clock gate placement and register clumping in physical design placement of vlsi ?? please reply me quickly ... please
can any one please tell me about smart clock gate placement and register clumping in physical design placement of vlsi ?? please reply me quickly ... please