how to fix fanout violations?
i already did seOptMode -fixFanoutLoad true
fallowed by optDesign -preCTS. so how to fix the violations manually?
What is the difference between preCTS, CTS, postCTS & postCTS_hold steps?
@yadav: am getting these viloations at the sign-off stage affter adding bufers to componsate transViolation. So, does deleting these nets causes deleting any of those buffers added?
@yadav: am getting these viloations at the sign-off stage affter adding bufers to componsate transViolation. So, does deleting these nets causes deleting any of those buffers added?
thanx yadav
At the sign-off stage how to overcome denity violations?
i tried editFixWidewires but it dint help much.
Can you please suggest any solution?
editFixWidewires splits wires that violate the MAXWIDTH value in the LEF LAYER (Routing) statement. Also splits diagonal wires whose width is greater than the MAXWIDTH value as they are drawn. It doesn't fix density violations. For density violation metal fill is done. https://www.cadence.com/rl/Resources/conference_papers/4.2Paper.pdf
i am working with soc -encounter. while routing the no violations were reported.
but when verified with calibre -lvs its showing 4 incomplete nets. when checked for same nets in soc - E those are no connected as required.
what would be the reason & how to overcome such violations.