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Photocurrent Detection Circuit (IMON Circuit)

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always@smart

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Hi All,

I'm a new guy for the Analog IC Design field. This is still the learning stage for me. RIght now i'm dealing with a project that is desiging Receiver part for the Optical Networking. I'm facing difficulties in the Photocurrent monitor circuit design as i couldn't find any sample of schematic or ciruitry from any books or from net. I already have designed the Transimpedance Amplifer and what i know is the IMON circuit input will be taken at the output of TIA. As my case i have the dummy tia in order to design the IMON. The IMON circut should detect the dc current of the current that going in to the TIA.

For example, if the input current to TIA is 0 ~ 15 uA (pp), than the IMON should detect the dc of 7.5uA and for other range of current.

Basically my idea was liek this.


when there is no input current at the TIA, the DC at output TIA is 1.319406 V. When there is the 0 ~ 15uA pp current goes to TIA, the output is 1.3138 V. So from here if I substract the DC of both this output and divide with the fixed resistor that is 700 ohm, i will get Idc at 8uA. and i did try the idc for other range of current and it works in the concept.

so, base on that i did develop a ciricut that is a comparator which will have 1 input with a fixed dc that is 1.319406 and another one with the output of the dummy TIA. so that whenever there is different range of current going in to TIA the output DC will vary and this will compare with the Vref of 1.319406 to generate a certain voltage at out comparator which will actually control the current. I did get the result but it is not getting accurate when the range of input current to is getting large. i did check all the biasing status of the CMOS, all were in saturation .. i don't know why.

I would apprecaite you guys if you can tell me what is wrong with that and how can i improve myh design in order to get the accurate I dc. Or if you guys have any other idea please help me to get it done.


Your cooperation is very much appreciated.

Thanks in advance,
Designer.
 

hi all,

still no answer yet!!?? I really hope someone here can help me.


Thnks in advance

--always@smart
 

Check my comments below.
always@smart said:
Hi All,

I'm a new guy for the Analog IC Design field. This is still the learning stage for me. RIght now i'm dealing with a project that is desiging Receiver part for the Optical Networking. I'm facing difficulties in the Photocurrent monitor circuit design as i couldn't find any sample of schematic or ciruitry from any books or from net. I already have designed the Transimpedance Amplifer and what i know is the IMON circuit input will be taken at the output of TIA. As my case i have the dummy tia in order to design the IMON. The IMON circut should detect the dc current of the current that going in to the TIA.

For example, if the input current to TIA is 0 ~ 15 uA (pp), than the IMON should detect the dc of 7.5uA and for other range of current.

Basically my idea was liek this.

when there is no input current at the TIA, the DC at output TIA is 1.319406 V. When there is the 0 ~ 15uA pp current goes to TIA, the output is 1.3138 V. So from here if I substract the DC of both this output and divide with the fixed resistor that is 700 ohm, i will get Idc at 8uA. and i did try the idc for other range of current and it works in the concept.

so, base on that i did develop a ciricut that is a comparator which will have 1 input with a fixed dc that is 1.319406 and another one with the output of the dummy TIA. so that whenever there is different range of current going in to TIA the output DC will vary and this will compare with the Vref of 1.319406 to generate a certain voltage at out comparator which will actually control the current. I did get the result but it is not getting accurate when the range of input current to is getting large. i did check all the biasing status of the CMOS, all were in saturation .. i don't know why.

> First, you shall define your TIA ckt in details, i.e. is output single ended? or diff. ? So far, I can only assume yours is a single ended. Next question, do you have an offset control loop within TIA to make proper bias? I have to assume you don't.
> Now comes the estimation: for 7.5uA input current, TIA output ~5.6mV. Therefore, you transimpedance is 750Ohm.
> You can make an error amplifier amplify the error signal between the outputs of TIA and the DUMMY TIA. The feedback can go to a current mirror or voltage controlled current source, and either inject current to or pull current from either DUMMY TIA or TIA input node. Such that you guarantee the error amplifier inputs difference equals to zero. I would recommend your error amplifier gain over 50dB for good accuracy since your Zt is so low.
> To monitor input PD current of TIA, just current mirror the feedback.
You are all done. Well, I'd like to say the DR shall be well above 40dB for this monitor ckt according to my experience. But if you are interested in monitoring overload side, the error signal shall be sampled at TIA first stage output to avoid distortion issues.
> Finally I should mention there is another kind Imon in TIA design, which is aimed to detect modulation current of photo diode. It's much more complicated in terms of linearity, response time and temperature depedence.
> Hope my 2 cents help. Good luck

I would apprecaite you guys if you can tell me what is wrong with that and how can i improve myh design in order to get the accurate I dc. Or if you guys have any other idea please help me to get it done.


Your cooperation is very much appreciated.

Thanks in advance,
Designer.
 

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