PCMCIA interface for PXA250

[frantak]

Hello,
we are designing PCMCIA interface for PXA250 without using companion chip SA1111. Our idea is to use CPLD Xilinx Cool Runner II (XC2C256) and write the VHDL code. I would like to ask if somebody has any experience or any recommendation. Thanks.

 

[tjendon74]

Hello;

I happen to be working on a new Xscale development platform that will center around the PXA250 CPU. I'm actually trying to bolt up a compact flash slot as a True IDE or ATA device for mass strorage options. I plan to use a Coolrunner CPLD to provide the needed buffering and needed glue logic. However, I do not have much experience myself with Xilinx FPGA's and CPLD's, but I'm willing to help out as much as I can, if in turn you might be able to help me.
However, we do have a PCMCIA solution, in which all the control and glue logic resides in an SpartanXL FPGA and it directly interfaces to the PXA250 CPU using I/O registers.

I'm not sure how much help I can be, but I'll provide as much as I can...

Thanks

tjendon74

 

[VladZ]

hi, frantak
do you really need a CPLD buffer?
What do you want to connect via PCMCIA ?
For example for connecting to the Ethernet chip SMSC91c111 you only need PSCTSEL, PIOR, IOWR and interrupt signals without any buffers.


best regards
vladz

 

[tjendon74]

We currently have one PCMCIA slot for I/O (for like 802.11 PCMCIA radios), in which the CPU interfaces to an FPGA that has the I/O registers and control logic to the PCMCIA slot.
Yes I'm trying to incorporate the needed buffering w/ control glue in one part. This will be a true mass storage drive controlled by the address decode and read/write transactions only to the CPU memory interface. We will have multiple I/O devices on the CPU address and data bus. To implement the compact flash-to-ATA interface, we are using the compact flash control signals coming from the PXA250. I need address and data buffers, in order to contol the reads/write direction during ATA file transfers. Most compact flash-to-ATA reference deisgns or app notes that I've come across have used address and data buffers with the necessary control glue logic

Just by chance, we are also hooking up the SMSC LAN91C111 ethernet controller as well.

If you'd like, I can send you a simple system block diagram that might be of some help...

Thanks

Tjendon74

 

[mYthorON]

hello, tjendon74. I am going to build a platform with a PCMCIA interface on board. But CPU has no PCMCIA controller, so I have to find a PCMCIA chip or use a CPLD/FPGA chip. Can you give me some advice which is the better solution?

You mentioned that you have a system block diagram. Would you like to send me via email?

My email address: mythoron@citiz.net

 

[petarpav]

Hi. You can look at:
h**p://www.opencores.org/projects/
May help you.

Best Regards.

 

[tcsa35]

Try LinkUp Systems PCCard/CompactFlash Interface for SA-1100
in iPAQ work fine.

 

[engrpausa]

frantak,

If you are doing a new design i believe you should be trying to use the P
XA255 instead of PXA250 it is not reccommended for new design. The PXA255 has many errata and power savings fixes over the PXA250 just in case you were unaware. It's the same chip/footprint/etc but with alot of good fixes.

I have done a CF interface that supports 2 CF slots with an SA1110 StrongARM (it's the glue logic from the developers manual basically) and the interface seems to be the same for the PXA250/255 so if you need advice just ask. We have implemented TrueIDE mode but never really tested.

--Bryan