Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

PCIe lanes confusion

Status
Not open for further replies.

engr.waqas

Full Member level 3
Full Member level 3
Joined
Jul 21, 2009
Messages
172
Helped
13
Reputation
26
Reaction score
10
Trophy points
1,298
Location
karachi,Pakistan
Visit site
Activity points
2,342
Considering the following scenario:

A designer wants to connect 3 devices on a PCIe x4 finger edge connector, commonly found on mother boards. All 3 devices will be populated on the same PCIe card. One device has 1 port of 2 lanes i.e (1 x2 PCIe port) Remaining two devices have 1 port of 1 lane (1 x1 PCIe port) each.

Scheme 1:
kQitY.png

Scheme 2:

Ljnmf.png

I've seen scheme 1 in the datasheets of some PCIe switches. I want to know if a PCIe switch is really required in this case.

What if we omit the switch and just split the PCIe lanes?

Will it be a legit PCIe network?

If yes then how will bus numbers be assigned?

Kindly ask if there is a need for clarification.
 

PCIe spec says:
Optional Link negotiation behaviors include Lane reversal, variable width Links, splitting of Ports
into multiple Links and the configuration of a crosslink.

So the question is if the peer (e.g. the motherboard's PCIe bridge) supports it. I guess, it won't.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top