Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

PARTIAL RECONFIGURATION OF FPGA

Status
Not open for further replies.
A

abhisheksbox

Member level 1
Joined
May 24, 2007
Messages
40
Helped
7
Reputation
14
Reaction score
1
Trophy points
1,288
Activity points
1,481
My M.Tech. thesis topic is "PARTIAL RECONFIGURATION OF FPGA" and my domain is analog, can any1 provide me any help in this metter?
 

There are plenty of papers about this issue. If you're going to use Xilinx tools you could take a look into 'HWICAP' datasheet. Look also at "WhichEverFPGAItIs Configuration Guide".
 
Last edited:

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top