In implementing a parallel plate capacitor utilizing a MOS,with the equivalent dielectric Si02, What is the effect on the effective capacitance is one plate is longer than the other, kindly do feedback. Thanks in advance
This is usally the case - top plate is gate material, and bottom plate is the mosfet tub which is always bigger than the top plate.. You can estimate it simply by using just the area of the gate region, or if you want to get fancy, you can include the fringing capacitance around the periphery of the gate region.
for the parallel plate capacitor
the bottom plate is larger than the top plate, such as
double-poly, poly-metal...
u can caculate the fringe capacitor from the relation file.