PADS 9.1: length match for DDR2 address through T junction

[neowt]

Hi all,
Can anyone advise me how to define Properties/Design Rule in PADS 9.1 Layout or Router so as to constraint the trace length of DDR2 address net from a CPU to two DDR2 RAMs through a T-junction? Also, can the length matching contraint travese the series matching resistor? The length matching is between the same net from source to two loads and also across all address/control signals. I am using a T-juction to connect the address lines in accordance to Micron's application notes.
According to the applicaiton notes, matching tolerance is 100 mils. Does it make any difference if I am only using the slowest DDR2 400MHz?

Thanks,

Neo

 

[otherguy]

Re: PADS 9.1: length match for DDR2 address through T juncti

Make a single pin part the same size as the via you are gonna use. Then set up your matched length rules for the corresponding pin pairs.