Overshot and ringing of fully differential opamp design

[tompham]

Hi all

Im designing fully differntial folding cascode opamp and my opamp has: gain = 70dB, phase margin = 80. When I test for overshoot and setling time I see a 20mV overshot but the worse is taking long time to settle. Anyone can give a suggestion how to fix this.? Thanks a lot

 

[yuvan]

I guess it is difficult to explain the problem without the circuit...

 

[D.A.(Tony)Stewart]

Certainly inconsistent results! Can you share the design, layout and test parameters ?

 

[LvW]

I doubt if the phase margin really is 80 deg. How did you perform the corresponding analysis?

 

[tompham]

Hi SunnySkyguy and yuvan

This is detail of my schematic and simulation waveform. I hope you can help me with this. My technology is smic 65nm









I think overshot and ringing because my cmfb design not well can cause the problem. I read in the book they say the GBW of
cmfb should greater or equal to main opamp , my design satisfied this condition but still have issue. The phase margin small also the factor to make ringing of the op amp too.

 

[LvW]

Tompham - what about capacitive loading during ac and time domain tests?

 

[tompham]

Hi LvW
I use 1pF loading capacitor at each output. I may figure out (not sure) the problem come from the sizing of each transistor (I use L=1um maybe too big for 65nm, since I want high gain but it make big cap at each node in opamp. During transient simulation the charge and discharge time of those caps will afect the circuit behavior. I will reduce the length to 0.2um (keep same W/L ratio) to see what happen