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Output resistance calculation

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Tesla96

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Hello,

Could you explain how the output resistance of an amplifier results ? For the attached amplifiers we have the depicted formulas resulting from the topology.What is the generic idea for computing output resistance?

Thanks in advance

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50uA is labelled near your output. Supply voltage +-0.9 V.
If only one output transistor conducts at a time (50uA max) then calculate path to a supply rail:
Resistance= 0.9/ 50 uA, unloaded.

If both output transistors can conduct simultaneously then 0.9/100uA. (Even though net output is 0V, it's the result of mixing two opposite polarities through two equal resistances. Therefore the calculation yields net impedance to 0V.)

To obtain a rough working figure (in hardware or simulation), measure volts with no load attached. Write down the reading.
Then attach ohmic resistance as a load. While your circuit operates, adjust load value until you read output voltage = half your previous reading.
Ohm value of your load is then equal to your circuit's output resistance.
Notice that is not necessarily the amount of load you want for your circuit. Your normal load probably draws a small fraction of 50uA.
 

Very interesting, especially the rough working method that you mentioned.Νevertheless, what I am trying to undrestand is how the above equations for Rout are obtained. I observe that the output resistance, in the above exaples,ισ the total pmos resistance in parallel with the total nmos resistance seen from the output node but I don't understand where this is coming from and if that is something generic.
 

Perhaps you're asking how to determine impedance in a transistor? In terms of Ohm's law it automatically adjusts its own resistance. This is according to voltages applied at its terminals, and a formula which takes into account its gain and turn-on threshold. Maybe that can be called a generic formula?

To create a more detailed formula, include further paramters specific to a particular device.
 

Talking myself into a challenge....

The sources of the N and P are at AC ground. The drains in
common. So their small signal rdsn and rdsp are in parallel
effectively.

Another approach is to sim, drive the output with a current source,
and measure the V, using math calc / graph the Zo.

A third method is use signal flow analysis and solve for Zo. Tedious.


Regards, Dana.
 
An analog circuit design text book will answer your question, e.g. Razavi, Design of Analog CMOS Integrated Circuits. Or Gray, Hurst, Lewis, Meyer, Analysis and Design of Analog Integrated Circuits.

As already mentioned, the simple output stage can be referred to common drain amplifier, the other to cascode circuit properties.
 
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