Oscillator specification for Spartan 6 FPGA

[Onedust]

hi,

I've a question regarding choosing an oscillator for the Spartan 6 FPGA. So, if someone has experience with it, please share

My question is: where can I find the information on the maximum allowable oscillator frequency for the FPGA in the datasheets of FPGA? Maybe some references/ information and example on how you choose the oscillator for an FPGA in general? I can buy an oscillator which generates 20 MHz as well as one which generates 200MHz. Is there an input (to the FPGA) limit?

I’ve read the Data Sheet DS162 (Spartan-6 FPGA Data Sheet: DC and Switching Characteristics)
Do I understand it right that Global Clock BUFGMUX with the speed grade -2 can be connected to the oscillator with max. output frequency of 375MHz? (Page 56 Table 48).

Also, I know that it is possible to multiply the frequency with DCM and PLL. How can I calculate what is the maximum frequency I can generate using PLL or DCM, if I for example have an oscillator of 20MHz or in general? Is there a formula, a table?

Also, I didn't find the maximum output frequency for I/O pins which are supporting LVDS. Could you please show me the specific page and table if you are familiar with it?

I’ve asked these questions on the Xilinx forum, but they answered that, they don’t have time to answer… why would you waste your time to answer that you don’t have time to answer…it’s a waste of time too. So yeah, I’m new to this subject, so please bear with me
Thank you beforehand

den

 

[TommiRouvali]

Well, the issue is so complex that there are no straight answers. There are some physcal limitations, and I think you have found them on datasheet. The real question is, what is the speed your desing can run? The faster clock you are using, the less you can do in one clock cycle. Faster clock means longer pipelines.

I have made one design on Spartan 6 and one for Spartan 3E. So I am really not an expert on this. My desigs run with 80MHz oscillator.

 

[mrflibble]

Do I understand it right that Global Clock BUFGMUX with the speed grade -2 can be connected to the oscillator with max. output frequency of 375MHz? (Page 56 Table 48).

You understand correctly.

Also, I know that it is possible to multiply the frequency with DCM and PLL. How can I calculate what is the maximum frequency I can generate using PLL or DCM, if I for example have an oscillator of 20MHz or in general? Is there a formula, a table?

Definitive way is to check the datasheet some more, because this info is in there. A quick way to check it is to fire up core generator from ISE and do some pointey clickey in the clocking wizard to get an idea of what N/M values etc are allowed.