Organizing the SRAM and FLASH memories into a unique FIFO buffer_efm32 MCU

[sabra88]

hello everybody,

I am working with the efm32 microcontroller and I want to store data into SRAM and FLASH memories. In order to do so, I have to organize them into a unique FIFO buffer and then use DMA in order to store the incoming packets from Wireless Sensor Network.

Does anybody has an idea about this process ??

 

[ads-ee]

Did you try searching for software fifo implementations? This was the third link returned by google.https://eewiki.net/display/microcontroller/Software+FIFO+Buffer+for+UART+Communication

Other than how to make a software FIFO you should read the documentation for the micro to learn how to setup the DMA to the buffer.

 

[sabra88]

Did you try searching for software fifo implementations? This was the third link returned by google.https://eewiki.net/display/microcontroller/Software+FIFO+Buffer+for+UART+Communication

Other than how to make a software FIFO you should read the documentation for the micro to learn how to setup the DMA to the buffer.

hello, Yes I've seen this link but this fifo is about widening your USART communication buffers but I am trying to organize my three memories as a unique FIFO and use the DMA to transfer the incoming packets for this FIFO and then forward them from this FIFO.
So the DMA configuration will be from the packets into the fifo and from the fifo into TXDATA. i've read about the DMA config and I don't have a problem with that.It is just that I am asking about the organisation of my memories into a unique FIFO , it means keeping track of my memory pages. Do I need to declare a struct with two pointers for read and write and then affect the end address and start address for those pointers or what ?

 

[FvM]

Storing data per DMA into flash is a bad idea and very unlikely to be supporte by any existing µP. Review the processor reference manual to get an idea how flash memory works.

 

[sabra88]

Storing data per DMA into flash is a bad idea and very unlikely to be supporte by any existing µP. Review the processor reference manual to get an idea how flash memory works.

i've read the µp refernce manual and the DMA is used to transfer data into both SRAM and FLASH and it is preferable since the project that I am working on is a wireless project so we are talking about low energy application. the primor memory target is the SRAM and then an external FRAM and finally if the network is disconnected for a long time and we have no other memory location whenre to store the stream of incoming packets, I will user the flash to store them. But it is only as a precaution in order not to loose data.

 

[sabra88]

yes dma is used with flash. can someone please tell me how to organize my memories as a unique fifo cause it is the hardest work concerning the store and forward!!

 

[sabra88]

I need to know how to organize my memories into a unique fifo. and yes dma is used to store data into the flash , it is said in the microcontroller refernce manual.

 

[FvM]

I see that ARM processors can perform DMA controlled write (self-programming) operations to flash memory. For other 32 bit processors with DMA you can select flash memory as destination, but I'm not sure if it results in a programming operation. I never tried.

The principle option to setup DMA transfers to flash doesn't necessarily mean that it brings an advantage over regular programmed transfers. Flash write operations are generally slow and have a number of restrictions.

Using flash for data storage must also consider it's limited endurance. I think it's not suitable for repeated write operations.

 

[sabra88]

[Moved]Store and Forward FIFO

Does anybody has any idea how to organize different memories into a unique FIFO using software??
I need to store data in this FIFO and then read from it