OrCad Capture: Convergence Problem

[Rashid_09]

Hello,

I'm trying to simulate Buck Converter with bridge-ciruit rectifier.
However, when I preform a transient analysis on the circuit i get the following:
"Convergence problem in transient analysis at Time = 4.768E-15
Time step = 4.768E-15, minimum allowable step size = 12.00E-15

These voltages failed to converge:"

Does anyone have a recommendation on things I should try and change in-order to get the circuit to converge?

 

[dick_freebird]

I'd start with that lineup of ideal blocks that
ends at an ideal(-ish) switch feeding an
ideal(-ish) inductor, that's a good way to
get an unsolvable dV/dt (infinite slew rate
and unbounded voltage require an
infinitesimal timestep, which you can't have).
You might play with cmin and with placing
sensible Rs and Cs about the current loops.

 

[Audioguru]

The schematic shows D8 and D9 shorted. Since there is no transformer for isolation then the input AC common and the circuit ground must not be connected together.

 

[Rashid_09]

The schematic shows D8 and D9 shorted. Since there is no transformer for isolation then the input AC common and the circuit ground must not be connected together.

How can you separate the common AC input and circuit ground? I understand that they need to be disconnected (isolated). But I don’t understand how to do it.

 

[Audioguru]

Without using an isolating transformer, D8 and D9 are not needed because they are shorted and D7 is also not needed because it is always reverse biased. Then D6 is used as a half-wave rectifier.