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optimal Aspect ratio for 150nm and 45nm node technologies for doing Hpice

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Bugatee

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I am doing the spice analysis for the above mentioned nodes and
ploting the power and temperature values after simulating for some applications on few core's.

Can anyone help me as to how to decide on the width(or rather say aspect ratio) to be used in the analysis while defining the .MODEL of the nmos and pmos.

Thanks a TON !!
 

Width is optimized according to your circuit design. Different circuit will have different optimized width.
 

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