Operational Amplifier Question in CMFB stability

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amr.walid

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Hi All
I have a problem that I want to design Op-Amp and its bias set as shown in the attached figures so When I vary the resistors of the bias the CMFB loop vary also so I can't get a defined Phase Margin across all values of resistor.
Please I want an answer to this effect that I can't understand it.
Thanks in advance
 

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I guess the problem is created by an unrealistic high common mode source impedance which won't be found in a real world amplifier setup.

You should add a small amount of common mode capacitance, e.g. from transformer center tap to ground.
 
Thanks for your help but mainly my problem is that I can't understand how these common mode bias resistors can affect my CMFB loop also this loop hasn't any relation with these two resistors.
 

Surely they are related.

Please consider what happens if the input stage is driven by a high common mode impedance. Also remember that MOSFETs have finite input impedance at higher frequencies.

How about sketching an equivalent circuit of the common mode amplifier and feedback path?
 
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